74AHC30

74AHC30; 74AHCT30 8-input NAND gate Rev. 5 — 6 May 2020 Product data sheet 1. General description The 74AHC30; 74AHCT30 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC30; 74AHCT30 provides an 8-input NAND function. 2. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Input levels: For 74AHC30: CMOS level For 74AHCT30: TTL level ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC30D -40 °C to +125 °C 74AHCT30D 74AHC30PW -40 °C to +125 °C 74AHCT30PW 74AHC30BQ -40 °C to +125 °C 74AHCT30BQ 74AHC30GU12 -40 °C to +125 °C Name Description Version SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 XQFN12 plastic, extremely thin quad flat package; no leads; SOT1174-1 12 terminals; body 1.70 × 2.0 × 0.50 mm Nexperia 74AHC30; 74AHCT30 8-input NAND gate 4. Marki...