2-input OR gate
74AHC1G32; 74AHCT1G32
2-input OR gate
Rev. 10 — 11 January 2022
Product data sheet
1. General description
The 74AHC1G...
Description
74AHC1G32; 74AHCT1G32
2-input OR gate
Rev. 10 — 11 January 2022
Product data sheet
1. General description
The 74AHC1G32; 74AHCT1G32 is a single 2-input OR gate. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
2. Features and benefits
Wide supply voltage range from 2.0 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power dissipation Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Symmetrical output impedance Balanced propagation delays Input levels:
For 74AHC1G32: CMOS level For 74AHCT1G32: TTL level ESD protection: HBM JESD22-A114E: exceeds 2000 V MM JESD22-A115-A: exceeds 200 V CDM JESD22-C101C: exceeds 1000 V Specified from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74AHC1G32GW
-40 °C to +125 °C
74AHCT1G32GW
74AHC1G32GV
-40 °C to +125 °C
74AHCT1G32GV
Name TSSOP5
SC-74A
Description
Version
plastic thin shrink small outline package; 5 leads; SOT353-1 body width 1.25 mm
plastic surface-mounted package; 5 leads
SOT753
Nexperia
74AHC1G32; 74AHCT1G32
2-input OR gate
4. Marking
Table 2. Marking codes Type number 74AHC1G32GW 74AHCT1G32GW 74AHC1G32GV 74AHCT1G32GV
Marking code[1] AG CG A32 C32
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1B 2A
Fig. 1. Logic symbol
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