Document
74AUP1G02
Low-power 2-input NOR gate
Rev. 9 — 13 January 2022
Product data sheet
1. General description
The 74AUP1G02 is a single 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
2. Features and benefits
• Wide supply voltage range from 0.8 V to 3.6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial Power-down mode operation • Latch-up performance exceeds 100 mA per JESD 78 Class II • Low static power consumption; ICC = 0.9 μA (maximum) • Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) • ESD protection: • HBM JESD22-A114F Class 3A exceeds 5000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101E exceeds 1000 V • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
74AUP1G02
Low-power 2-input NOR gate
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74AUP1G02GW -40 °C to +125 °C
Name TSSOP5
74AUP1G02GM -40 °C to +125 °C XSON6
74AUP1G02GN -40 °C to +125 °C XSON6
74AUP1G02GS -40 °C to +125 °C XSON6
74AUP1G02GX -40 °C to +125 °C X2SON5
Description
plastic thin shrink small outline package; 5 leads; body width 1.25 mm
plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
extremely thin small outline package; no leads; 6 terminals; body 0.9 × 1.0 × 0.35 mm
extremely thin small outline package; no leads; 6 terminals; body 1.0 × 1.0 × 0.35 mm
plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 × 0.8 × 0.32 mm
Version SOT353-1 SOT886 SOT1115 SOT1202 SOT1226-3
4. Marking
Table 2. Marking Type number 74AUP1G02GW 74AUP1G02GM 74AUP1G02GN 74AUP1G02GS 74AUP1G02GX
Marking code[1] pB pB pB pB pB
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1B 2A
Y4
mna103
Fig. 1. Logic symbol
1
≥1
4
2
mna104
Fig. 2. IEC logic symbol
B
A
Fig. 3. Logic diagram
Y
mna105
74AUP1G02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 13 January 2022
© Nexperia B.V. 2022. All rights reserved
2 / 18
Nexperia
6. Pinning information
6.1. Pinning
74AUP1G02
B1 A2
5 VCC
GND 3
4Y
001aaf019
Fig. 4. Pin configuration SOT353-1 (TSSOP5)
74AUP1G02
B1 A2
6 VCC 5 n.c.
GND 3
4Y
001aaf021 Transparent top view
Fig. 6. Pin configuration SOT1115 and SOT1202 (XSON6)
6.2. Pin description
Table 3. Pin description Symbol
B A GND Y n.c. VCC
Pin TSSOP5 and X2SON5 1 2 3 4 5
74AUP1G02
Low-power 2-input NOR gate
74AUP1G02
B1
6 VCC
A2
5 n.c.
GND 3
4Y
001aaf020 Transparent top view
Fig. 5. Pin configuration SOT886 (XSON6)
74AUP1G02
B1
3 GND
5 VCC
A2
4Y
aaa-002996 Transparent top view
Fig. 7. Pin configuration SOT1226-3 (X2SON5)
XSON6 1 2 3 4 5 6
Description
data input data input ground (0 V) data output not connected supply voltage
74AUP1G02
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 13 January 2022
© Nexperia B.V. 2022. All rights reserved
3 / 18
Nexperia
7. Functional description
Table 4. Function table H = HIGH voltage level; L = LOW voltage level.
Input
A
B
L
L
L
H
H
L
H
H
74AUP1G02
Low-power 2-input NOR gate
Output Y H L L L
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC IIK VI IOK VO IO ICC IGND Tstg Ptot
supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current storage temperature total power dissipation
VI < 0 V VO > VCC or VO < 0 V Active mode and Power-down mode VO = 0 V to VCC
Tamb = -40 °C to +125 °C
-0.5
-50
[1] -0.5
-
[1] -0.5
-
-
-50
-65
[2]
-
+4.6 V
-
mA
+4.6 V
±50 mA
+4.6 V
±20 mA
+50 mA
-
mA
+150 °C
250 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
For SOT886 (XSON6) package: Ptot derates linearly with 3.3 mW/K above 74 °C. For SOT1115 (XSON6) package: Ptot derates linearly with 3.2 mW/K above 71 °C. For .