74VHC32

74VHC32; 74VHCT32 Quad 2-input OR gate Rev. 2 — 3 September 2020 Product data sheet 1. General description The 74VHC32; 74VHCT32 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC32; 74VHCT32 provide the 2-input OR function. 2. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Input levels: The 74VHC32 operates with CMOS input level The 74VHCT32 operates with TTL input level ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74VHC32D -40 °C to +125 °C SO14 74VHCT32D 74VHC32PW -40 °C to +125 °C TSSOP14 74VHCT32PW 74VHC32BQ -40 °C to +125 °C DHVQFN14 74VHCT32BQ Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Version SOT108-1 SOT402-1 SOT762-1 Nexperia 4. Functional diagram 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B Fig. 1. Logic symbol 1Y 3 2Y 6 3Y 8 4Y 11 mna242 A B Fig. 3. Logic diagram (...