Document
74CBTLV3126
4-bit bus switch
Rev. 6 — 16 February 2023
Product data sheet
1. General description
The 74CBTLV3126 provides a 4-bit high-speed bus switch with separate output enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is LOW.
To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the GND through a pull-down resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
• Supply voltage range from 2.3 V to 3.6 V • Standard ’126’-type pinout • High noise immunity • Complies with JEDEC standard:
• JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM AEC-Q100-011 revision B exceeds 1000 V • 5 Ω switch connection between two ports • Rail to rail switching on data I/O ports • CMOS low power consumption • Latch-up performance exceeds 250 mA per JESD78B Class I level A • IOFF circuitry provides partial Power-down mode operation • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
74CBTLV3126
4-bit bus switch
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74CBTLV3126DS
-40 °C to +125 °C
SSOP16 [1] plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm
SOT519-1
74CBTLV3126PW -40 °C to +125 °C
TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm
74CBTLV3126BQ
-40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm
[1] Also known as QSOP16.
4. Functional diagram
1OE 1A
2OE 2A
3OE 3A
4OE 4A
Fig. 1. Logic symbol
1B 2B 3B 4B 001aaj023
nA
nB
nOE
001aal245
Fig. 2. Logic diagram (one switch)
74CBTLV3126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 February 2023
© Nexperia B.V. 2023. All rights reserved
2 / 17
Nexperia
5. Pinning information
74CBTLV3126
4-bit bus switch
5.1. Pinning
DS package SOT519-1 (SSOP16)
n.c. 1 1OE 2
1A 3 1B 4 2OE 5 2A 6 2B 7 GND 8
16 VCC 15 4OE 14 4A 13 4B 12 3OE 11 3A 10 3B 9 n.c.
aaa-035993
PW package SOT402-1 (TSSOP14)
1OE 1 1A 2 1B 3
2OE 4 2A 5 2B 6
GND 7
14 VCC 13 4OE 12 4A 11 4B 10 3OE 9 3A 8 3B
aaa-036008
BQ package SOT762-1 (DHVQFN14)
1 1OE 14 VCC
terminal 1 index area
1A 2 1B 3 2OE 4 2A 5 2B 6
GND(1)
13 4OE 12 4A 11 4B 10 3OE 9 3A
GND 7 3B 8
aaa-036009
Transparent top view
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND.
5.2. Pin description
Table 2. Pin description Symbol
1OE, 2OE, 3OE, 4OE 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B GND VCC n.c.
Pin SOT519-1 2, 5, 12, 15 3, 6, 11, 14 4, 7, 10, 13 8 16 1, 9
SOT402-1 and SOT762-1 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 7 14 -
Description
output enable input A input/output B output/input ground (0 V) supply voltage not connected
74CBTLV3126
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 February 2023
© Nexperia B.V. 2023. All rights reserved
3 / 17
Nexperia
6. Functional description
Table 3. Function table H = HIGH voltage level; L = LOW voltage level. Output enable input nOE L H
Function switch OFF-state ON-state
74CBTLV3126
4-bit bus switch
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC VI VSW IIK ISK ISW ICC IGND Tstg Ptot
supply voltage input voltage switch voltage input clamping current switch clamping current switch current supply current ground current storage temperature total power dissipation
control inputs enable and disable mode VI < -0.5 V VI < -0.5 V VSW = 0 V to VCC
Tamb = -40 °C to +125 °C
-0.5
[1] -0.5
[2] -0.5
-50
-50
-
-
-100
-65
[3]
-
+4.6 V
+4.6 V
VCC + 0.5 V
-
mA
-
mA
±128 mA
+100 mA
-
mA
+150 °C
500
mW
[1] The minimum input voltage rating may be exceeded if the input clamping current ratings are observed. [2] The switch voltage ratings may be exceeded if switch clamping current ratings are obse.