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74CBTLVD3244 Dataheets PDF



Part Number 74CBTLVD3244
Manufacturers nexperia
Logo nexperia
Description 8-bit level-shifting bus switch
Datasheet 74CBTLVD3244 Datasheet74CBTLVD3244 Datasheet (PDF)

74CBTLVD3244 8-bit level-shifting bus switch with 4-bit output enables Rev. 3 — 5 April 2019 Product data sheet 1. General description The 74CBTLVD3244 is a dual 4-pole, single-throw bus switch. The device features two output enable inputs (nOE) that each control four switch channels. The switches are disabled when the associated nOE input is HIGH. Schmitt trigger action at control inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for parti.

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74CBTLVD3244 8-bit level-shifting bus switch with 4-bit output enables Rev. 3 — 5 April 2019 Product data sheet 1. General description The 74CBTLVD3244 is a dual 4-pole, single-throw bus switch. The device features two output enable inputs (nOE) that each control four switch channels. The switches are disabled when the associated nOE input is HIGH. Schmitt trigger action at control inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 3.0 V to 3.6 V • High noise immunity • Complies with JEDEC standard: • JESD8-B/JESD36 (3.0 V to 3.6 V) • ESD protection: • HBM JESD22-A114F exceeds 2000 V • CDM AEC-Q100-011 revision B exceeds 1000 V • 5 Ω switch connection between two ports • Rail to rail switching on data I/O ports • CMOS low power consumption • Latch-up performance exceeds 250 mA per JESD78B Class I level A • IOFF circuitry provides partial Power-down mode operation • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74CBTLVD3244PW -40 °C to +125 °C 74CBTLVD3244BQ -40 °C to +125 °C Name Description TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm DHVQFN20 plastic dual-in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm Version SOT360-1 SOT764-1 Nexperia 4. Functional diagram 1A1 1A2 1A3 1A4 2468 1OE 1 74CBTLVD3244 8-bit level-shifting bus switch with 4-bit output enables 18 1B1 16 1B2 14 1B3 12 1B4 2OE 19 2A1 11 2A2 13 2A3 15 2A4 17 9753 2B1 2B2 2B3 2B4 001aan303 Fig. 1. Logic symbol 5. Pinning information 5.1. Pinning 74CBTLVD3244 1OE 1 1A1 2 2B4 3 1A2 4 2B3 5 1A3 6 2B2 7 1A4 8 2B1 9 GND 10 20 VCC 19 2OE 18 1B1 17 2A4 16 1B2 15 2A3 14 1B3 13 2A2 12 1B4 11 2A1 aaa-000025 Fig. 3. Pin configuration SOT360-1 (TSSOP20) 1A1 1A4 1OE 2A1 2A4 2OE Fig. 2. Logic diagram 1B1 1B4 2B1 2B4 001aan196 1 1OE 20 VCC terminal 1 index area 74CBTLVD3244 1A1 2 2B4 3 1A2 4 2B3 5 1A3 6 2B2 7 1A4 8 2B1 9 GND(1) 19 2OE 18 1B1 17 2A4 16 1B2 15 2A3 14 1B3 13 2A2 12 1B4 GND 10 2A1 11 Transparent top view Fig. 4. aaa-000027 (1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However if it is soldered the solder land should remain floating or be connected to GND. Pin configuration SOT764-1 (DHVQFN20) 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 April 2019 © Nexperia B.V. 2019. All rights reserved 2 / 14 Nexperia 74CBTLVD3244 8-bit level-shifting bus switch with 4-bit output enables 5.2. Pin description Table 2. Pin description Symbol 1OE, 2OE 1A1 to 1A4 2B1 to 2B4 GND 2A1 to 2A4 1B1 to 1B4 VCC Pin 1, 19 2, 4, 6, 8 9, 7, 5, 3 10 11, 13, 15, 17 18, 16, 14, 12 20 Description output enable input (active LOW) data input/output (A port) data input/output (B port) ground (0 V) data input/output (A port) data input/output (B port) positive supply voltage 6. Functional description Table 3. Function selection H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. Input nOE L Input/output nAn, nBn nAn = nBn HZ 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage VSW switch voltage IIK input clamping current ISK switch clamping current ISW switch current ICC supply current IGND ground current Tstg storage temperature Ptot total power dissipation Conditions enable and disable mode VI/O < -0.5 V VI < -0.5 V VSW = 0 V to VCC Tamb = -40 °C to +125 °C Min -0.5 [1] -0.5 [1] -0.5 -50 -50 -100 -65 [2] - Max +4.6 +4.6 VCC + 0.5 ±128 +100 +150 500 Unit V V V mA mA mA mA mA °C mW [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP20 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN20 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K. 74CBTLVD3244 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 5 April 2019 © Nexperia B.V. 2019. All rights reserved 3 / 14 Nexperia 74CBTLVD3244 8-bit level-shifting bus switch with 4-bit output enables 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW switch voltage Tamb ambient temperature .


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