74VHC14; 74VHCT14
Hex inverting Schmitt trigger
Rev. 2 — 1 November 2022
Product data sheet
1. General description
The...
74VHC14; 74VHCT14
Hex inverting Schmitt trigger
Rev. 2 — 1 November 2022
Product data sheet
1. General description
The 74VHC14; 74VHCT14 are high-speed Si-gate CMOS devices and are pin compatible with Low-power
Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.
The 74VHC14; 74VHCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
2. Features and benefits
Balanced propagation delays All inputs have Schmitt-trigger action Inputs accept voltages higher than VCC Input levels:
The 74VHC14 operates with CMOS input level The 74VHCT14 operates with TTL input level ESD protection: HBM EIA/JESD22-A114E exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74VHC14D 74VHCT14D
-40 °C to +125 °C SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
74VHC14PW 74VHCT14PW
-40 °C to +125 °C
TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm
74VHC14BQ 74VHCT14BQ
-40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0....