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74LVC3G04 Dataheets PDF



Part Number 74LVC3G04
Manufacturers nexperia
Logo nexperia
Description Triple inverter
Datasheet 74LVC3G04 Datasheet74LVC3G04 Datasheet (PDF)

74LVC3G04 Triple inverter Rev. 14 — 16 April 2021 Product data sheet 1. General description The 74LVC3G04 is a triple inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output.

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74LVC3G04 Triple inverter Rev. 14 — 16 April 2021 Product data sheet 1. General description The 74LVC3G04 is a triple inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • 5 V tolerant outputs for interfacing with 5 V logic • High noise immunity • Complies with JEDEC standard: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8B/JESD36 (2.7 V to 3.6 V) • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • ±24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • Latch-up performance exceeds 250 mA • Direct interface with TTL levels • IOFF circuitry provides partial Power-down mode operation • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC3G04DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G04DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm 74LVC3G04GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; SOT833-1 8 terminals; body 1 × 1.95 × 0.5 mm 74LVC3G04GN -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 × 1.0 × 0.35 mm SOT1116 74LVC3G04GS -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 Nexperia 4. Marking Table 2. Marking codes Type number 74LVC3G04DP 74LVC3G04DC 74LVC3G04GT 74LVC3G04GN 74LVC3G04GS Marking code[1] V04 V04 V04 V4 V4 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 74LVC3G04 Triple inverter 1A 1Y 2A 2Y 3A 3Y 001aah793 Fig. 1. Logic symbol 1 1 001aah794 Fig. 2. IEC logic symbol 6. Pinning information A Y mna110 Fig. 3. Logic diagram (one driver) 6.1. Pinning 74LVC3G04 1A 1 3Y 2 2A 3 GND 4 8 VCC 7 1Y 6 3A 5 2Y 001aad954 Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74LVC3G04 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 001aad955 Transparent top view Fig. 5. Pin configuration SOT833-1, SOT1116 and SOT1203 (XSON8) 74LVC3G04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 16 April 2021 © Nexperia B.V. 2021. All rights reserved 2 / 15 Nexperia 74LVC3G04 Triple inverter 6.2. Pin description Table 3. Pin description Symbol 1A, 2A, 3A GND 1Y, 2Y, 3Y VCC Pin 1, 3, 6 4 7, 5, 2 8 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input nA L H Output nY H L Description data input ground (0 V) data output supply voltage 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC IIK VI IOK VO IO ICC IGND Ptot Tstg supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current total power dissipation storage temperature VI < 0 V VO > VCC or VO < 0 V Active mode Power-down mode; VCC = 0 V VO = 0 V to VCC Tamb = -40 °C to +125 °C -0.5 -50 [1] -0.5 - [1] -0.5 [1] -0.5 - - -100 [2] - -65 +6.5 V - mA +6.5 V ±50 mA VCC + 0.5 V +6.5 V ±50 mA 100 mA - mA 250 mW +150 °C [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT505-2 (TSSOP8) package: Ptot derates linearly with 4.6 mW/K above 96 °C. For SOT765-1 (VSSOP8) package: Ptot derates linearly with 4.9 mW/K above 99 °C. For SOT833-1 (XSON8) package: Ptot derates linearly with 3.1 mW/K above 68 °C. For SOT1116 (XSON8) package: Ptot derates linearly with 4.2 mW/K above 90 °C. For SOT1203 (XSON8) package: Ptot derates linearly with 3.6 mW/K above 81 °C. 74LVC3G04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 14 — 16 April 2021 © Nexperia B.V. 2021. All rights reserved 3 / 15 Nexperia 74LVC3G04 Triple inverter 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb Δt/ΔV ambient temp.


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