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74AHC1G79-Q100 Dataheets PDF



Part Number 74AHC1G79-Q100
Manufacturers nexperia
Logo nexperia
Description Single D-type flip-flop
Datasheet 74AHC1G79-Q100 Datasheet74AHC1G79-Q100 Datasheet (PDF)

74AHC1G79-Q100; 74AHCT1G79-Q100 Single D-type flip-flop; positive-edge trigger Rev. 4 — 11 January 2022 Product data sheet 1. General description The 74AHC1G79-Q100; 74AHCT1G79-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators i.

  74AHC1G79-Q100   74AHC1G79-Q100



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74AHC1G79-Q100; 74AHCT1G79-Q100 Single D-type flip-flop; positive-edge trigger Rev. 4 — 11 January 2022 Product data sheet 1. General description The 74AHC1G79-Q100; 74AHCT1G79-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C • Wide supply voltage range from 2.0 to 5.5 V • Overvoltage tolerant inputs to 5.5 V • High noise immunity • CMOS low power dissipation • Latch-up performance exceeds 100 mA per JESD 78 Class II Level A • Symmetrical output impedance • Balanced propagation delays • Input levels: • For 74AHC1G79-Q100: CMOS level • For 74AHCT1G79-Q100: TTL level • ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AHC1G79GW-Q100 -40 °C to +125 °C TSSOP5 74AHCT1G79GW-Q100 74AHC1G79GV-Q100 -40 °C to +125 °C SC-74A 74AHCT1G79GV-Q100 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads Version SOT353-1 SOT753 Nexperia 74AHC1G79-Q100; 74AHCT1G79-Q100 Single D-type flip-flop; positive-edge trigger 4. Marking Table 2. Marking codes Type number 74AHC1G79GW-Q100 74AHCT1G79GW-Q100 74AHC1G79GV-Q100 74AHCT1G79GV-Q100 Marking[1] AP CP A79 C79 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1D Q4 2 CP Fig. 1. Logic symbol mna440 CP C C C D Fig. 3. Logic diagram TG C C TG C 1D 2 CP Q4 mna441 Fig. 2. IEC logic symbol C TG C C TG C Q mna442 74AHC_AHCT1G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 11 January 2022 © Nexperia B.V. 2022. All rights reserved 2 / 12 Nexperia 74AHC1G79-Q100; 74AHCT1G79-Q100 Single D-type flip-flop; positive-edge trigger 6. Pinning information 6.1. Pinning 74AHC1G79 74AHCT1G79 D1 CP 2 5 VCC GND 3 4Q 001aaf091 Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) 6.2. Pin description Table 3. Pin description Symbol Pin D 1 CP 2 GND 3 Q 4 VCC 5 Description data input clock pulse input ground (0 V) data output supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care; Q + 1 = state after the next LOW-to-HIGH CP transition. Inputs Output CP D Q+1 ↑ L L ↑ H H L X Q 74AHC_AHCT1G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 11 January 2022 © Nexperia B.V. 2022. All rights reserved 3 / 12 Nexperia 74AHC1G79-Q100; 74AHCT1G79-Q100 Single D-type flip-flop; positive-edge trigger 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC VI IIK IOK IO ICC IGND Tstg Ptot supply voltage input voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation VI < -0.5 V VO < -0.5 V or VO > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V Tamb = -40 °C to +125 °C -0.5 -0.5 -20 [1] - - - -75 -65 [2] - +7.0 V +7.0 V - mA ±20 mA ±25 mA 75 mA - mA +150 °C 250 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C. For SOT753 (SC-74A) package: Ptot derates linearly with 3.8 mW/K above 85 °C. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC VI VO Tamb Δt/ΔV supply voltage input voltage output voltage ambient temperature input transition rise and VCC = 3.3 V ± 0.3 V fall rate VCC = 5.0 V ± 0.5 V 74AHC1G79-Q100 Min Typ Max 2.0 5.0 5.5 0 - 5.5 0 - VCC -40 +25 +125 - - 100 - - 20 74AHCT1G79-Q100 Min Typ Max 4.5 5.0 5.5 0 - 5.5 0 - VCC -40 +25 +125 - - - - - 20 Unit V V V °C ns/V ns/V 10. Static characteristics Table 7. Static characteristics Voltages are refere.


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