AND gate. 74AHCT2G08-Q100 Datasheet

74AHCT2G08-Q100 gate. Datasheet pdf. Equivalent


nexperia 74AHCT2G08-Q100
74AHC2G08-Q100;
74AHCT2G08-Q100
Dual 2-input AND gate
Rev. 4 — 21 March 2018
Product data sheet
1 General description
The 74AHC2G08-Q100 and 74AHCT2G08-Q100 are high-speed Si-gate CMOS devices.
They provide two 2-input AND gates.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to
5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2 Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
• – MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
3 Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name Description
74AHC2G08DP-Q100 -40 °C to +125 °C
74AHCT2G08DP-Q100
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
74AHC2G08DC-Q100 -40 °C to +125 °C
74AHCT2G08DC-Q100
VSSOP8 plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
Version
SOT505-2
SOT765-1


74AHCT2G08-Q100 Datasheet
Recommendation 74AHCT2G08-Q100 Datasheet
Part 74AHCT2G08-Q100
Description Dual 2-input AND gate
Feature 74AHCT2G08-Q100; 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate Rev. 4 — 21 March 2018 Product data sheet 1 .
Manufacture nexperia
Datasheet
Download 74AHCT2G08-Q100 Datasheet




nexperia 74AHCT2G08-Q100
Nexperia
74AHC2G08-Q100; 74AHCT2G08-Q100
Dual 2-input AND gate
4 Marking
Table 2. Marking
Type number
74AHC2G08DP-Q100
74AHCT2G08DP-Q100
74AHC2G08DC-Q100
74AHCT2G08DC-Q100
Marking code[1]
A08
C08
A08
C08
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5 Functional diagram
1 1A
2 1B
5 2A
6 2B
Figure 1.  Logic symbol
1Y 7
2Y 3
mna724
1 &7
2
5 &3
6
mna725
Figure 2.  IEC logic symbol
A
B
Figure 3.  Logic diagram (one gate)
Y
mna221
74AHC_AHCT2G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 21 March 2018
© Nexperia B.V. 2018. All rights reserved.
2 / 14



nexperia 74AHCT2G08-Q100
Nexperia
74AHC2G08-Q100; 74AHCT2G08-Q100
Dual 2-input AND gate
6 Pinning information
6.1 Pinning
74AHC2G08
74AHCT2G08
1A 1
1B 2
2Y 3
GND 4
8 VCC
7 1Y
6 2B
5 2A
001aaj389
Figure 4.  Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2 Pin description
Table 3. Pin description
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
VCC
Pin
1, 5
2, 6
4
7, 3
8
7 Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level.
Input
nA nB
LL
LH
HL
HH
Description
data input
data input
ground (0 V)
data output
supply voltage
Output
nY
L
L
L
H
74AHC_AHCT2G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 21 March 2018
© Nexperia B.V. 2018. All rights reserved.
3 / 14





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