PHB32N06LT

PHB32N06LT N-channel TrenchMOS logic level FET Rev. 02 — 30 November 2009 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits „ Suitable for logic level gate drive sources 1.3 Applications „ General purpose switching „ Switched-mode power supplies 1.4 Quick reference data Table 1. Quick reference Symbol VDS ID Parameter drain-source voltage drain current Conditions Tj ≥ 25 °C; Tj ≤ 175 °C Tmb = 25 °C; VGS = 5 V; see Figure 1 and 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 Dynamic characteristics QGD gate-drain charge VGS = 5 V; ID = 20 A; VDS = 44 V; Tj = 25 °C; see Figure 11 Static characteristics RDSon drain-source on-state resistance VGS = 4.5 V; ID = 20 A; Tj = 25 °C VGS = 5 V; ID = 20 A; Tj = 25 °C; see Figure 9 and 10 Min Typ Max Unit - - 60 V - - 34 A - - 97 W - 8.5 - nC - 31.5 43 mΩ - 30 40 mΩ Nexperia PHB32N06LT N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1G gate 2D drain 3S source mb D mounting base; connected to drain [1] It is not possible to make a connection to pin 2. Simplified outline [1] mb 2 13 SOT404 (D2PAK) 3. Ordering information Graphic symbol D G mbb076 S Table 3. Or...