PSMN5R2-60YL

PSMN5R2-60YL N-channel 60 V, 5.2 mΩ logic level MOSFET in LFPAK56 3 June 2016 Product data sheet 1. General description Logic level N-channel MOSFET in an LFPAK56 (Power SO8) package using TrenchMOS technology. This product is designed and qualified for use in a wide range of power supply & motor control equipment. 2. Features and benefits Advanced TrenchMOS provides low RDSon and low gate charge Logic level gate operation Avalanche rated, 100% tested LFPAK provides maximum power density in a Power SO8 package 3. Applications Synchronous rectifier in LLC topology Chargers & adaptors with Vout < 10 V Fast charge & USB-PD applications Battery powered motor control LED lighting & TV backlight 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 2 [1] Ptot total power dissipation Tmb = 25 °C; Fig. 1 Static characteristics RDSon drain-source on-state VGS = 5 V; ID = 25 A; Tj = 25 °C; Fig. 11 resistance Dynamic characteristics QGD gate-drain charge ID = 25 A; VDS = 48 V; VGS = 5 V; Fig. 13; Fig. 14 [1] Continuous current is limited by package. Min Typ Max Unit - - 60 V - - 100 A - - 195 W - 4.6 6 mΩ - 11.1 - nC Nexperia PSMN5R2-60YL N-channel 60 V, 5.2 mΩ logic level MOSFET in LFPAK56 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source mb 2 S source 3 S s...