Document
BSS84AKS
50 V, 160 mA dual P-channel Trench MOSFET
Rev. 1 — 23 May 2011
Product data sheet
1. Product profile
1.1 General description
Dual P-channel enhancement mode Field-Effect Transistor (FET) in a very small SOT363 (SC-88) package using Trench MOSFET technology.
1.2 Features and benefits
Logic-level compatible Very fast switching Trench MOSFET technology
ESD protection up to 1 kV AEC-Q101 qualified
1.3 Applications
Relay driver High-speed line driver
High-side loadswitch Switching circuits
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
Per transistor
VDS
drain-source voltage
Tj = 25 °C
VGS gate-source voltage
ID drain current
VGS = -10 V; Tamb = 25 °C
Static characteristics (per transistor)
RDSon
drain-source on-state resistance
VGS = -10 V; ID = -100 mA; Tj = 25 °C
Min Typ Max Unit
-20 [1] -
-
-50 V 20 V -160 mA
- 4.5 7.5 Ω
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2.
Nexperia
BSS84AKS
50 V, 160 mA dual P-channel Trench MOSFET
2. Pinning information
Table 2. Pin 1 2 3 4 5 6
Pinning information Symbol Description S1 source 1 G1 gate 1 D2 drain 2 S2 source 2 G2 gate 2 D1 drain 1
Simplified outline
654
Graphic symbol
D1 D2
123
SOT363 (TSSOP6)
G1 G2 S1 S2 sym147
3. Ordering information
Table 3. Ordering information
Type number
Package
Name
BSS84AKS
TSSOP6
4. Marking
Description plastic surface-mounted package; 6 leads
Table 4. Marking codes Type number BSS84AKS
[1] % = placeholder for manufacturing site code
Marking code[1] %VY
Version SOT363
BSS84AKS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 May 2011
© Nexperia B.V. 2017. All rights reserved
2 of 17
Nexperia
BSS84AKS
50 V, 160 mA dual P-channel Trench MOSFET
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Per transistor
VDS drain-source voltage VGS gate-source voltage ID drain current
IDM peak drain current Ptot total power dissipation
Tj = 25 °C
VGS = -10 V; Tamb = 25 °C VGS = -10 V; Tamb = 100 °C Tamb = 25 °C; single pulse; tp ≤ 10 µs Tamb = 25 °C
Per device
Ptot total power dissipation
Tj junction temperature
Tamb
ambient temperature
Tstg storage temperature
Source-drain diode
IS source current ESD maximum rating
VESD
electrostatic discharge voltage
Tsp = 25 °C Tamb = 25 °C
Tamb = 25 °C HBM
Min Max Unit
-20 [1] [1] [2] [1] -
-50 20 -160 -100 -640 280 320 990
V V mA mA mA mW mW mW
[2] -55 -55 -65
445 mW 150 °C 150 °C 150 °C
[1] -
-160 mA
[3] -
1000 V
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2. [2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [3] Measured between all pins.
BSS84AKS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 May 2011
© Nexperia B.V. 2017. All rights reserved
3 of 17
Nexperia
120 Pder (%)
80
001aao121
BSS84AKS
50 V, 160 mA dual P-channel Trench MOSFET
120
Ider (%)
80
001aao122
40 40
0 -75 -25 25 75 125 175
Tj (°C)
0
-75 -25 25
75 125 175
Tj (°C)
Fig 1. Normalized total power dissipation as a function of junction temperature
-1 ID (A) -10-1
-10-2
Fig 2. Normalized continuous drain current as a function of junction temperature
001aao139 (1)
(2)
(3) (4) (5) (6)
-10-3 -10-1
-1
-10 -102 VDS (V)
IDM is single pulse (1) tp = 100 μs (2) tp = 1 ms (3) tp = 10 ms (4) DC; Tsp = 25 °C (5) tp = 100 ms (6) DC; Tamb = 25 °C; drain mounting pad 1 cm2
Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source voltage
BSS84AKS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 May 2011
© Nexperia B.V. 2017. All rights reserved
4 of 17
Nexperia
BSS84AKS
50 V, 160 mA dual P-channel Trench MOSFET
6. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter
Per device
Rth(j-a)
thermal resistance from junction to ambient
Per transistor
Rth(j-a)
thermal resistance from junction to ambient
Conditions in free air in free air
Rth(j-sp)
thermal resistance from junction to solder point
Min Typ Max
[1] - - 300
[1] [2] -
-
390 445 340 390 - 130
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2.
Unit
K/W
K/W K/W K/W
103
Zth(j-a) (K/W)
102
duty cycle = 1
0.5 0.25
0.75
0.33 0.2
0.1 0.05
0 0.02 10 0.01
017aaa034
1 10−3
10−2
10−1
1
10 102 103 tp (s)
FR4 PCB, standard footprint
Fig 4. Per transistor: Transient thermal impeda.