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BUK9635-55A Dataheets PDF



Part Number BUK9635-55A
Manufacturers nexperia
Logo nexperia
Description N-channel MOSFET
Datasheet BUK9635-55A DatasheetBUK9635-55A Datasheet (PDF)

BUK9635-55A N-channel TrenchMOS logic level FET Rev. 2 — 21 April 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits „ AEC Q101 compliant „ Low conduction losses due to low on-state resistance 1.3 Applications „ .

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BUK9635-55A N-channel TrenchMOS logic level FET Rev. 2 — 21 April 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits „ AEC Q101 compliant „ Low conduction losses due to low on-state resistance 1.3 Applications „ Automotive and general purpose power switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter VDS drain-source voltage ID drain current Ptot total power dissipation Static characteristics RDSon drain-source on-state resistance Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Conditions Tj ≥ 25 °C; Tj ≤ 175 °C Tmb = 25 °C VGS = 10 V; ID = 25 A; Tj = 25 °C VGS = 5 V; ID = 25 A; Tj = 25 °C ID = 14 A; Vsup ≤ 25 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped Min Typ Max Unit - - 55 V - - 34 A - - 85 W - 24 32 mΩ - 26 35 mΩ - - 49 mJ Nexperia BUK9635-55A N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pin 1 2 3 mb Pinning information Symbol Description G gate D drain S source D mounting base; connected to drain 3. Ordering information Simplified outline mb 2 13 SOT404 (D2PAK) Graphic symbol D G mbb076 S Table 3. Ordering information Type number Package Name BUK9635-55A D2PAK 4. Limiting values Description plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) Version SOT404 Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VDGR VGS ID Parameter drain-source voltage drain-gate voltage gate-source voltage drain current IDM peak drain current Ptot total power dissipation Tstg storage temperature Tj junction temperature VGSM peak gate-source voltage Source-drain diode Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ Tmb = 100 °C Tmb = 25 °C Tmb = 25 °C; pulsed Tmb = 25 °C pulsed; tp ≤ 50 µs IS source current ISM peak source current Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Tmb = 25 °C pulsed; Tmb = 25 °C ID = 14 A; Vsup ≤ 25 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped Min Max Unit - 55 V - 55 V -10 10 V - 24 A - 34 A - 133 A - 85 W -55 175 °C -55 175 °C -15 15 V - 34 A - 133 A - 49 mJ BUK9635-55A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 April 2011 © Nexperia B.V. 2017. All rights reserved 2 of 13 Nexperia BUK9635-55A N-channel TrenchMOS logic level FET 100 Pder (%) 80 60 40 20 0 0 003aaf283 50 100 150 200 Tmb (°C) 100 ID (%) 80 60 40 20 0 0 003aaf284 50 100 150 200 Tmb (°C) Fig 1. Normalized total power dissipation as a function of mounting base temperature Fig 2. VGS ≥ 5 V Normalized continuous drain current as a function of mounting base temperature 103 IDM (A) 102 RDS(on) = VDS / ID 003aaf285 tp = 1 μs 10 μs 120 WDSS (%) 80 003aaf299 10 100 μs D.C. 1 ms 10 ms 1 1 10 102 VDS (V) Tmb = 25 °C Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 40 0 20 60 100 140 180 T(mb) (°C) ID = 75 A Fig 4. Normalised drain-source non-repetitive avalanche energy as a function of mounting-base temperature BUK9635-55A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 April 2011 © Nexperia B.V. 2017. All rights reserved 3 of 13 Nexperia BUK9635-55A N-channel TrenchMOS logic level FET 102 IAV (A) 10 003aaf300 25 °C Tj prior to avalanche = 150 °C Fig 5. 1 10−3 10−2 10−1 1 10 tAV (ms) unclamped inductive load Single-shot avalanche rating; avalanche current as a function of avalanche period 5. Thermal characteristics Table 5. Symbol Rth(j-mb) Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to mounting base thermal resistance from junction to ambient Conditions minimum footprint; FR4 board Min Typ Max Unit - - 1.8 K/W - 50 - K/W 10 Zth(j-mb) (K/W) 1 δ = 0.5 003aaf286 0.2 0.1 10−1 0.05 0.02 P 10−2 10−7 0 10−6 10−5 10−4 10−3 tp T 10−2 10−1 tp δ= T t 1 10 tp (s) Fig 6. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9635-55A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 April 2011 © Nexperia B.V. 2017. All rights reserved 4 of 13 Nexperia BUK9635-55A N-channel TrenchMOS logic level FET 6. Characteristics Table 6. Characteristics Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Dynamic characteristic.


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