Document
BUK9K30-80E
Dual N-channel 80 V, 30 mΩ logic level MOSFET
12 May 2018
Product data sheet
1. General description
Dual Logic level N-channel MOSFET in an LFPAK56D (Dual Power-SO8) package using TrenchMOS technology. This product has been designed and qualified to AEC-Q101 standard for use in high performance automotive applications.
2. Features and benefits
• Dual MOSFET • AEC-Q101 compliant • Repetitive avalanche rated • Suitable for thermally demanding environments due to 175 °C rating • True logic level gate with VGS(th) rating of greater than 0.5 V at 175 °C
3. Applications
• 12 V, 24 V and 48 V automotive systems • Motors, lamps and solenoid control • Transmission control • Ultra high performance power switching
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Limiting values FET1 and FET2
VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C
ID
drain current
VGS = 5 V; Tmb = 25 °C; Fig. 2
Ptot total power dissipation Tmb = 25 °C; Fig. 1
Static characteristics FET1 and FET2
RDSon
drain-source on-state VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 11 resistance
Dynamic characteristics FET1 and FET2
QGD
gate-drain charge
ID = 5 A; VDS = 64 V; VGS = 5 V;
Tj = 25 °C; Fig. 13; Fig. 14
Source-drain diode FET1 and FET2
Qr
recovered charge
IS = 5 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 25 V; Tj = 25 °C
Min Typ Max Unit - - 80 V - - 17 A - - 53 W - 21 30 mΩ
- 6.2 - nC
- 30.8 - nC
Nexperia
BUK9K30-80E
Dual N-channel 80 V, 30 mΩ logic level MOSFET
5. Pinning information
Table 2. Pinning information Pin Symbol Description 1 S1 source1 2 G1 gate1 3 S2 source2 4 G2 gate2 5 D2 drain2 6 D2 drain2 7 D1 drain1 8 D1 drain1
Simplified outline
8765
Graphic symbol
D1 D1
D2 D2
1234
LFPAK56D (SOT1205)
S1 G1 S2 G2 mbk725
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
BUK9K30-80E
LFPAK56D
Description
plastic, single ended surface mounted package (LFPAK56D); 8 leads
Version SOT1205
7. Marking
Table 4. Marking codes Type number BUK9K30-80E
Marking code 93080E
BUK9K30-80E
Product data sheet
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12 May 2018
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Nexperia
BUK9K30-80E
Dual N-channel 80 V, 30 mΩ logic level MOSFET
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Limiting values FET1 and FET2
VDS
drain-source voltage
25 °C ≤ Tj ≤ 175 °C
VDGR
drain-gate voltage
RGS = 20 kΩ
VGS
gate-source voltage
DC; Tj ≤ 175 °C
Pulsed; Tj ≤ 175 °C
Ptot total power dissipation Tmb = 25 °C; Fig. 1
ID
drain current
VGS = 5 V; Tmb = 25 °C; Fig. 2
VGS = 5 V; Tmb = 100 °C; Fig. 2
IDM
peak drain current
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3
Tstg storage temperature
Tj junction temperature
Source-drain diode FET1 and FET2
IS
source current
Tmb = 25 °C
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche ruggedness FET1 and FET2
EDS(AL)S
non-repetitive drainsource avalanche energy
ID = 17 A; Vsup ≤ 80 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped; Fig. 4
[1] Accumulated Pulse duration up to 50 hours delivers zero defect ppm.
[2] Significantly longer life times are achieved by lowering Tj and or VGS. [3] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[4] Refer to application note AN10273 for further information.
Min Max Unit
[1] [2]
-10 -15 -55 -55
80 V 80 V 10 V 15 V 53 W 17 A 12 A 68 A 175 °C 175 °C
- 17 A - 68 A
[3] [4] -
72 mJ
BUK9K30-80E
Product data sheet
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12 May 2018
© Nexperia B.V. 2018. All rights reserved
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Nexperia
120 Pder (%)
80
40
03aa16
BUK9K30-80E
Dual N-channel 80 V, 30 mΩ logic level MOSFET
20 ID (A)
15
aaa-026806
10
5
0 0 50 100 150 200 Tmb (°C)
Fig. 1. Normalized total power dissipation as a function of mounting base temperature
102 ID (A)
Limit RDSon = VDS / ID
10
0 0 25 50 75 100 125 150 175 200 Tmb (°C)
VGS ≥ 5 V
Fig. 2. Continuous drain current as a function of mounting base temperature, FET1 and FET2
tp = 10 µs 100 µs
aaa-026885
DC 1
1 ms 10-1 10 ms
100 ms
10-2 10-1
1
10 102 103 VDS (V)
Tmb = 25 °C; IDM is a single pulse
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage, FET1 and FET2
BUK9K30-80E
Product data sheet
All information provided in this document is subject to legal disclaimers.
12 May 2018
© Nexperia B.V. 2018. All rights reserved
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Nexperia
102 IAL (A)
10
1
10-1
BUK9K30-80E
Dual N-channel 80 V, 30 mΩ logic level MOSFET
aaa-026807
(1) (2) (3)
Fig. 4.
10-2 10-3
10-2
10-1
1 tAL (ms)
10
(1) Tj (init) = 25°C; (2) Tj (init) = 150°C; (3) Repetitive Avalanche
Avalanche rating; avalanche current as a function of avala.