BUK9Y19-55B
N-channel TrenchMOS logic level FET
Rev. 03 — 29 February 2008
Product data sheet
1. Product profile
1.1 ...
BUK9Y19-55B
N-channel TrenchMOS logic level FET
Rev. 03 — 29 February 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode power Field-Effect
Transistor (FET) in a plastic package using Nexperia High-Performance Automotive (HPA) TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.
1.2 Features
175 °C rated Q101 compliant
Logic level compatible Very low on-state resistance
1.3 Applications
12 V and 24 V loads General purpose power switching
Automotive systems Motors, lamps and solenoids
1.4 Quick reference data
Table 1. Quick reference Symbol Parameter ID drain current
Ptot total power dissipation Static characteristics
RDSon
drain-source on-state resistance
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source avalanche energy
Conditions VGS = 5 V; Tmb = 25 °C; see Figure 1 and 4 Tmb = 25 °C; see Figure 2
VGS = 5 V; ID = 20 A; Tj = 25 °C; see Figure 12 and 13
ID = 46 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped
Min Typ Max Unit - - 46 A - - 85 W - 16.3 19 mΩ
- - 80 mJ
Nexperia
BUK9Y19-55B
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pin 1 2 3 4 mb
Pinning Symbol S S S G D
Description source source source gate mounting base; connected to drain
3. Ordering information
Simplified outline
mb
1234
SOT669 (LFPAK)
Graphic symbol
D
G mbb076 S
Table 3. Or...