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74AUP1G157-Q100 Dataheets PDF



Part Number 74AUP1G157-Q100
Manufacturers nexperia
Logo nexperia
Description Low-power 2-input multiplexer
Datasheet 74AUP1G157-Q100 Datasheet74AUP1G157-Q100 Datasheet (PDF)

74AUP1G157-Q100 Low-power 2-input multiplexer Rev. 2 — 4 November 2021 Product data sheet 1. General description The 74AUP1G157-Q100 is a single 2-input multiplexer. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the out.

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74AUP1G157-Q100 Low-power 2-input multiplexer Rev. 2 — 4 November 2021 Product data sheet 1. General description The 74AUP1G157-Q100 is a single 2-input multiplexer. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C • Wide supply voltage range from 0.8 V to 3.6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial Power-down mode operation • Low static power consumption; ICC = 0.9 µA (maximum) • Latch-up performance exceeds 100 mA per JESD 78 Class II • Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • ESD protection: • MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V • HBM JESD22-A114F Class 3A. Exceeds 5000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AUP1G157GM-Q100 -40 °C to +125 °C Name XSON6 Description plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm Version SOT886 Nexperia 74AUP1G157-Q100 Low-power 2-input multiplexer 4. Marking Table 2. Marking Type number 74AUP1G157GM-Q100 Marking code [1] aP [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 13 I1 I0 6S Y Fig. 1. Logic symbol 4 001aac652 I1 1 I0 3 SELECTOR 6 S Fig. 3. Functional diagram MULTIPLEXER OUTPUT S 4Y 001aac655 6 G1 3 1 MUX 4 1 1 001aac653 Fig. 2. IEC logic symbol S I1 I0 Fig. 4. Logic diagram Y 001aac654 6. Pinning information 6.1. Pinning 74AUP1G157 I1 1 6S GND 2 5 VCC Fig. 5. Pin configuration SOT886 (XSON6) I0 3 4Y 001aae016 Transparent top view 74AUP1G157_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2021 © Nexperia B.V. 2021. All rights reserved 2 / 13 Nexperia 74AUP1G157-Q100 Low-power 2-input multiplexer 6.2. Pin description Table 3. Pin description Symbol Pin I1 1 GND 2 I0 3 Y 4 VCC 5 S 6 Description data input from source 1 ground (0 V) data input from source 0 multiplexer output supply voltage c.


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