Document
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
Rev. 4.1 — 31 March 2022
Product data sheet
1. General description
The 74AVCH1T45-Q100 is a single bit, dual supply transceiver that enables bidirectional level translation. The 74AVCH1T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing potentially damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 0.8 V to 3.6 V • High noise immunity • CMOS low power dissipation • Overvoltage tolerant inputs to 3.6 V • Dynamically controlled outpus • Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) • ESD protection: • MIL-STD-883, method 3015 Class 3B exceeds 8000 V • HBM JESD22-A114E Class 3B exceeds 8000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) • Maximum data rates: • 500 Mbit/s (1.8 V to 3.3 V translation) • 320 Mbit/s (< 1.8 V to 3.3 V translation) • 320 Mbit/s (translate to 2.5 V or 1.8 V) • 280 Mbit/s (translate to 1.5 V) • 240 Mbit/s (translate to 1.2 V) • Suspend mode • Bus hold on data inputs • Latch-up performance exceeds 100 mA per JESD 78 Class II • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial Power-down mode operation
Nexperia
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74AVCH1T45GW-Q100 -40 °C to +125 °C
Name TSSOP6
Description
Version
plastic thin shrink small outline package; 6 leads; SOT363-2 body width 1.25 mm
4. Marking
Table 2. Marking Type number
74AVCH1T45GW-Q100
Marking code [1] K5
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
DIR 5 A3
VCC(A)
Fig. 1. Logic symbol
VCC(B)
4B
001aag885
6. Pinning information
DIR A
VCC(A)
Fig. 2. Logic diagram
6.1. Pinning
74AVCH1T45
VCC(A) 1 GND 2
6 VCC(B) 5 DIR
A3
Fig. 3. Pin configuration SOT363-2 (TSSOP6)
4B 001aag887
B VCC(B)
001aag886
74AVCH1T45_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4.1 — 31 March 2022
© Nexperia B.V. 2022. All rights reserved
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Nexperia
74AVCH1T45-Q100
Dual-supply voltage level translator/transceiver; 3-state
6.2. Pin description
Table 3. Pin description
Symbol
Pin
VCC(A)
1
GND
2
A
3
B
.