Document
74CBTLV3253-Q100
Dual 1-of-4 multiplexer/demultiplexer
Rev. 3 — 24 September 2020
Product data sheet
1. General description
The 74CBTLV3253-Q100 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs (S0, S1) and two output enable inputs (1OE, 2OE). The low ON resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. When pin nOE = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin nOE = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 and S1. To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the VCC through a pull-up resistor. The current-sinking capability of the driver determines the minimum value of the resistor.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Supply voltage range from 2.3 V to 3.6 V • High noise immunity • Complies with JEDEC standard:
• JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) • ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) • 5 Ω switch connection between two ports • Rail to rail switching on data I/O ports • CMOS low power consumption • Latch-up performance exceeds 250 mA per JESD78B Class I level A • IOFF circuitry provides partial Power-down mode operation • Multiple package options • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Nexperia
74CBTLV3253-Q100
Dual 1-of-4 multiplexer/demultiplexer
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
74CBTLV3253D-Q100 -40 °C to +125 °C SO16
plastic small outline package; 16 leads; body width 3.9 mm
74CBTLV3253PW-Q100 -40 °C to +125 °C
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm
74CBTLV3253BQ-Q100 -40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm
Version SOT109-1
SOT403-1
SOT763-1
4. Functional diagram
1A 7 2A 9
6 1B1 5 1B2 4 1B3 3 1B4 10 2B1 11 2B2 12 2B3 13 2B4
S0 14 S1 2 1OE 1 2OE 15
Fig. 1. Logic diagram
001aal208
74CBTLV3253_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 24 September 2020
© Nexperia B.V. 2020. All rights reserved
2 / 17
Nexperia
5. Pinning information
74CBTLV3253-Q100
Dual 1-of-4 multiplexer/demultiplexer
5.1. Pinning
74CBTLV3253-Q100
1OE 1
16 VCC
S1 2
15 2OE
1B4 3
14 S0
1B3 4
13 2B4
1B2 5
12 2B3
1B1 6
11 2B2
1A 7
10 2B1
GND 8
9 2A
aaa-006845
Fig. 2. Pin configuration SOT109-1 (SO16)
74CBTLV3253-Q100
1OE 1 S1 2
1B4 3 1B3 4 1B2 5 1B1 6
1A 7 GND 8
16 VCC 15 2OE 14 S0 13 2B4 12 2B3 11 2B2 10 2B1 9 2A
aaa-006846
Fig. 3. Pin configuration SOT403-1 (TSSOP16)
74CBTLV3253-Q100
1 1OE 16 VCC
terminal 1 index area
S1 2 1B4 3 1B3 4 1B2 5 1B1 6
1A 7
GND(1)
15 2OE 14 S0 13 2B4 12 2B3 11 2B2 10 2B1
GND 8 2A 9
aaa-006847
Transparent top view
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration SOT763-1 (DHVQFN16)
5.2. Pin description
Table 2. Pin description Symbol 1OE, 2OE S0, S1 1B1 to 1B4 2B1 to 2B4 GND 1A, 2A VCC
Pin 1, 15 14, 2 6, 5, 4, 3 10, 11, 12, 13 8 7, 9 16
Description output enable input (active LOW) select input B input/output B input/output ground (0 V) A input/output supply voltage
74CBTLV3253_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 24 September 2020
© Nexperia B.V. 2020. All rights reserved
3 / 17
Nexperia
74CBTLV3253-Q100
Dual 1-of-4 multiplexer/demultiplexer
6. Functional description
Table 3. Function table H = HIGH voltage level; L = LOW voltage level.
Inputs
1OE
2OE
S1
S0
X
H
X
X
H
X
X
X
L
L
L
L
L
L
L
H
L
L
H
L
L
L
H
H
Function switch
disconnect 2A and 2Bn disconnect 1A and 1Bn 1A to 1B1 and 2A to 2B1 1A to 1B2 and 2A to 2B2 1A to 1B3 and 2A to 2B3 1A to 1B4 and 2A to 2B4
7. L.