Dual buffer gate
74HC2G34-Q100;
74HCT2G34-Q100
Dual buffer gate
Rev. 3 — 3 February 2022
Product data sheet
1. General description
The ...
Description
74HC2G34-Q100;
74HCT2G34-Q100
Dual buffer gate
Rev. 3 — 3 February 2022
Product data sheet
1. General description
The 74HC2G34-Q100; 74HCT2G34-Q100 is a dual buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V High noise immunity CMOS low power dissipation Balanced propagation delays Unlimited input rise and fall times Input levels:
For 74HC2G34-Q100: CMOS level For 74HCT2G34-Q100: TTL level Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74HC2G34GW-Q100 -40 °C to +125 °C
74HCT2G34GW-Q100
74HC2G34GV-Q100 -40 °C to +125 °C
74HCT2G34GV-Q100
Name TSSOP6
SC-74; TSOP6
Description
Version
plastic thin shrink small outline package; 6 leads; SOT363-2 body width 1.25 mm
plastic su...
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