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ADMW1001 Dataheets PDF



Part Number ADMW1001
Manufacturers Analog Devices
Logo Analog Devices
Description Flexible Condition Monitoring Platform
Datasheet ADMW1001 DatasheetADMW1001 Datasheet (PDF)

Data Sheet Flexible Condition Monitoring Platform ADMW1001 FEATURES Embedded FIFO Enabled by the MeasureWare ecosystem Rapid configuration Upgradeable firmware enabling new features Complete measurement node (sensor excitation, sensor measurement, and sensor compensation) Directly digitizes compensated and uncompensated sensors Sensors include: RTD Thermocouple Multiple diagnostics Per measurement configuration (sensor type, settling time, gain, excitation currents, linearization, speed) Co.

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Data Sheet Flexible Condition Monitoring Platform ADMW1001 FEATURES Embedded FIFO Enabled by the MeasureWare ecosystem Rapid configuration Upgradeable firmware enabling new features Complete measurement node (sensor excitation, sensor measurement, and sensor compensation) Directly digitizes compensated and uncompensated sensors Sensors include: RTD Thermocouple Multiple diagnostics Per measurement configuration (sensor type, settling time, gain, excitation currents, linearization, speed) Configurable cycle sampling time Embedded sequencer Simultaneous 50 Hz and 60 Hz antialiasing rejection SPI communications interface Power supply voltage: 3.3 V Operating temperature range: −40°C to +85°C Wheatstone bridge Embedded linearization for 2-/3-wire PT100/1000 RTDs J, K, T, and custom type thermocouples Supports custom lookup tables Supports selected I2C/SPI sensors 2 thermocouple channels 2 universal (4-/6-wire bridge, RTD, ratiometric referencing) APPLICATIONS Asset health monitoring Laboratory instrumentation Smart agriculture Supply chain health tracking Condition profiling channels FUNCTIONAL BLOCK DIAGRAM AVDD IOVDD RSENSE_BIAS RSENSE– RSENSE+ CH1_AIN– CH1_AIN+ CH1_IEXC CH1_TC+/IEXC TC_BIAS COM_TC– CH2_TC+/IEXC CH2_IEXC CH2_AIN+ CH2_AIN– VREF+ VREF– INTERNAL REFERENCE DIGITAL FILTER MUX PGA PGA 24-BIT Σ-Δ ADC 24-BIT Σ-Δ ADC CURRENT SOURCES MEASUREMENT TIME 50Hz/60Hz REJECTION CHANNEL SEQUENCER DIAGNOSTICS CALIBRATION CORRECTION/ TRANSLATION LOOKUP TABLE/ POLYNOMIAL FIFO INTERFACE LOGIC RESET WAKE_UP STATUS CS0 MISO0 MOSI0 SCLK0 DRDY CS1 MISO1 MOSI1 SCLK1 ADMW1001 17325-001 GND_SW AGND DVDD_REG AVDD_REG INT_REF Figure 1. SCL SDA GPIO0 GPIO1 GPIO2 Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2019 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADMW1001 TABLE OF CONTENTS Features .............................................................................................. 1  Applications....................................................................................... 1  Functional Block Diagram .............................................................. 1  Revision History ............................................................................... 2  General Description ......................................................................... 3  Specifications..................................................................................... 4  Timing Characteristics ................................................................ 7  Sensor Interface Timing Specifications ..................................... 8  Absolute Maximum Ratings.......................................................... 10  Thermal Resistance .................................................................... 10  ESD Caution................................................................................ 10  Pin Configuration and Function Descriptions........................... 11  Typical Performance Characteristics ........................................... 13  Theory of Operation ...................................................................... 14  Applications Information .............................................................. 15  REVISION HISTORY 7/2019—Revision 0: Initial Version Data Sheet ADC ............................................................................................. 15  Powering the ADMW1001 ....................................................... 15  Interface Logic ............................................................................ 15  Channel Sequencer .................................................................... 15  Digital Filter ................................................................................ 15  Reference ..................................................................................... 15  Calibration and LUT.................................................................. 15  PGA and Buffer .......................................................................... 15  Excitation Current Source......................................................... 15  Correction and Translation....................................................... 16  Multiplexer .................................................................................. 16  Outline Dimensions ...........................................


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