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PIC18LF24K50 Dataheets PDF



Part Number PIC18LF24K50
Manufacturers Microchip
Logo Microchip
Description High-Performance Microcontrollers
Datasheet PIC18LF24K50 DatasheetPIC18LF24K50 Datasheet (PDF)

PIC18(L)F24/25K40 28-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology Description These PIC18(L)F24/25K40 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals, combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications. These 28 -pin devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averagi.

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PIC18(L)F24/25K40 28-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology Description These PIC18(L)F24/25K40 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals, combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications. These 28 -pin devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold comparisons. They also offer a set of Core Independent Peripherals such as Complementary Waveform Generator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD) and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost. Core Features • C Compiler Optimized RISC Architecture • Operating Speed: – DC – 64 MHz clock input over the full VDD range – 62.5 ns minimum instruction cycle • Programmable 2-Level Interrupt Priority • 31-Level Deep Hardware Stack • Three 8-Bit Timers (TMR2/4/6) with Hardware Limit Timer (HLT) • Four 16-Bit Timers (TMR0/1/3/5) • Low-Current Power-on Reset (POR) • Power-up Timer (PWRT) • Brown-out Reset (BOR) • Low-Power BOR (LPBOR) Option • Windowed Watchdog Timer (WWDT): – Watchdog Reset on too long or too short interval between watchdog clear events – Variable prescaler selection – Variable window size selection – All sources configurable in hardware or software Memory • Up to 32K bytes Program Flash Memory • Up to 2048 Bytes Data SRAM Memory © 2017 Microchip Technology Inc. Datasheet 40001843D-page 1 PIC18(L)F24/25K40 • 256 Bytes Data EEPROM • Programmable Code Protection • Direct, Indirect and Relative Addressing modes Operating Characteristics • Operating Voltage Ranges: – 1.8V to 3.6V (PIC18LF24/25K40 ) – 2.3V to 5.5V ( PIC18F24/25K40) • Temperature Range: – Industrial: -40°C to 85°C – Extended: -40°C to 125°C Power-Saving Operation Modes • Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower) • Idle: CPU Halted While Peripherals Operate • Sleep: Lowest Power Consumption • Peripheral Module Disable (PMD): – Ability to selectively disable hardware module to minimize active power consumption of unused peripherals • Extreme Low-Power mode (XLP) – Sleep: 500 nA typical @ 1.8V – Sleep and Watchdog Timer: 900 nA typical @ 1.8V eXtreme Low-Power (XLP) Features • Sleep mode: 50 nA @ 1.8V, typical • Windowed Watchdog Timer: 500 nA @ 1.8V, typical • Secondary Oscillator: 500 nA @ 32 kHz • Operating Current: – 8 uA @ 32 kHz, 1.8V, typical – 32 uA/MHz @ 1.8V, typical Digital Peripherals • Complementary Waveform Generator (CWG): – Rising and falling edge dead-band control – Full-bridge, half-bridge, 1-channel drive – Multiple signal sources • Capture/Compare/PWM (CCP) modules: – Two CCPs – 16-bit resolution for Capture/Compare modes – 10-bit resolution for PWM mode • 10-Bit Pulse-Width Modulators (PWM): © 2017 Microchip Technology Inc. Datasheet 40001843D-page 2 PIC18(L)F24/25K40 – Two 10-bit PWMs • Serial Communications: – One Enhanced USART (EUSART) with Auto-Baud Detect, Auto-wake-up on Start. RS-232, RS-485, LIN compatible – SPI – I2C, SMBus and PMBus™ compatible • Up to 25 I/O Pins and One Input Pin: – Individually programmable pull-ups – Slew rate control – Interrupt-on-change on all pins – Input level selection control • Programmable CRC with Memory Scan: – Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B) – Calculate CRC over any portion of Flash or EEPROM – High-speed or background operation • Hardware Limit Timer (TMR2/4/6+HLT): – Hardware monitoring and Fault detection • Peripheral Pin Select (PPS): – Enables pin mapping of digital I/O • Data Signal Modulator (DSM) Analog Peripherals • 10-Bit Analog-to-Digital Converter with Computation (ADC2): – 24 external channels – Conversion available during Sleep – Four internal analog channels – Internal and external trigger options – Automated math functions on input signals: • Averaging, filter calculations, oversampling and threshold comparison – 8-bit hardware acquisition timer • Hardware Capacitive Voltage Divider (CVD) Support: – 8-bit precharge timer – Adjustable sample and hold capacitor array – Guard ring digital output drive • Zero-Cross Detect (ZCD): – Detect when AC signal on pin crosses ground • 5-Bit Digital-to-Analog Converter (DAC): – Output available externally – Programmable 5-bit voltage (% of VDD,[VRef+ - VRef-], FVR) – Internal connections to Comparators and ADC • Two Comparators (CMP): – Four external inputs – External output via PPS © 2017 Microchip Technology Inc. Datasheet 40001843D-page 3 PIC18(L)F24/25K40 • Fixed .


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