74AC11086

74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise D EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic 300-mil DIPs (N) description SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D OR N PACKAGE (TOP VIEW) 1A 1Y 2Y GND GND 3Y 4Y 4B 1 2 3 4 5 6 7 8 16 1B 15 2A 14 2B 13 VCC 12 VCC 11 3A 10 3B 9 4A This device contains four independent 2-input exclusive-OR gates. It performs the Boolean function Y = A ⊕ B = AB + AB in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. The 74AC11086 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each gate) INPUTS AB OUTPUT Y LL L LH H HL H HH L logic symbol† 1 1A 16 1B 15 2A 14 2B 11 3A 10 3B 9 4A 8 4B =1 2 1Y 3 2Y 6 3Y 7 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA infor...