74AC11034

Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain six independent noninverters. They perform the Boolean function Y = A. The 54AC11034 is characterized for operation over the full military temperature range of – 55°C to 125°C. The 74AC11034 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE (each inverter) INPUT A OUTPUT Y HH LL 54AC11034, 74AC11034 HEX NONINVERTERS SCAS034A – FEBRUARY 1988 – REVISED APRIL 1993 54AC11034 . . . J PACKAGE 74AC11034 . . . DW OR N PACKAGE (TOP VIEW) 1Y 2Y 3Y GND GND GND GND 4Y 5Y 6Y 1 2 3 4 5 6 7 8 9 10 20 1A 19 2A 18 3A 17 NC 16 VCC 15 VCC 14 NC 13 4A 12 5A 11 6A 54AC11034 . . . FK PACKAGE (TOP VIEW) 3A NC VCC VCC NC 2A 3 2 1 20 19 4 18 4A 1A 5 17 5A 1Y 6 16 6A 2Y 7 15 6Y 3Y 8 14 5Y 9 10 11 12 13 GND GND GND GND 4Y NC – No internal connection logic symbol† 1A 20 2A 19 3A 18 4A 13 5A 12 6A 11 1 1 1Y 2 2Y 3 3Y 8 4Y 9 5Y 10 6Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, J, and N packages. logic diagram (positive logic) 1A 20 1 1Y 2A 19 2 2Y 3A 18 3 3Y 4A 13 8 4Y 5A 12 9 5Y 6A 11 10 ...