74AC11239 DUAL 2–LINE TO 4–LINE DECODER/DEMULTIPLEXER
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
Incorporates Two Enable Inputs to Simplify
Cascading and/or Data Reception
Flow-Through Architecture to Optimize
PCB Layout
Center-Pin VCC and GND Configurations to
Minimize High-Speed Switching Noise
t EPIC (Enha...