Independent Registers and Enables for A
and B Buses
Multiplexed Real-Time and Stored Data Inverting Data Paths Flow-Through Architecture Optimizes PCB
Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Opti...
