54AC16472

54AC16472, 74AC16472 18-BIT REGISTERED TRANSCIEVERS WITH 3-STATE OUTPUTS SCAS165A – JUNE 1990 – REVISED APRIL 1996 D Members of the Texas Instruments Widebus ™ Family D 3-State True Outputs 54AC16472 . . . WD PACKAGE 74AC16472 . . . DL PACKAGE (TOP VIEW) D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process 1OEAB 1LEAB 1A1 GND 1A2 1A3 1 2 3 4 5 6 56 1OEBA 55 1LEBA 54 1B1 53 GND 52 1B2 51 1B3 D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Pin Spacings VCC 1A4 1A5 1A6 GND 1A7 1A8 1A9 2A1 7 8 9 10 11 12 13 14 15 50 VCC 49 1B4 48 1B5 47 1B6 46 GND 45 1B7 44 1B8 43 1B9 42 2B1 description 2A2 16 2A3 17 41 2B2 40 2B3 The ’AC16472 are 18-bit registered transceivers GND 18 39 GND that contain two sets of D-type latches for temporary storage of data flowing in either direction. They can be used as two 9-bit transceivers or one 18-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. 2A4 2A5 2A6 VCC 2A7 2A8 GND 2A9 19 20 21 22 23 24 25 26 38 2B4 37 2B5 36 2B6 35 VCC 34 2B7 33 2B8 32 GND 31 2B9 When OEAB and LE...