DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS
TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS
D Low rDS(on) . . . 0.18 Ω at VGS = – 10 V D 3-V Compatible D...
Description
TPS1120, TPS1120Y DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS
D Low rDS(on) . . . 0.18 Ω at VGS = – 10 V D 3-V Compatible D Requires No External VCC D TTL and CMOS Compatible Inputs D VGS(th) = – 1.5 V Max D ESD Protection Up to 2 kV per
MIL-STD-883C, Method 3015
SLVS080A – MARCH 1994 – REVISED AUGUST 1995
D PACKAGE (TOP VIEW)
1SOURCE 1GATE
2SOURCE 2GATE
1 2 3 4
8 1DRAIN 7 1DRAIN 6 2DRAIN 5 2DRAIN
description
The TPS1120 incorporates two independent p-channel enhancement-mode MOSFETs that have been optimized, by means of the Texas Instruments LinBiCMOS™ process, for 3-V or 5-V power distribution in battery-powered systems. With a maximum VGS(th) of – 1.5 V and an IDSS of only 0.5 µA, the TPS1120 is the ideal high-side switch for low-voltage portable battery-management systems, where maximizing battery life is a primary concern. Because portable equipment is potentially subject to electrostatic discharge (ESD), the MOSFETs have built-in circuitry for 2-kV ESD protection. End equipment for the TPS1120 includes notebook computers, personal digital assistants (PDAs), cellular telephones, bar-code scanners, and PCMCIA cards. For existing designs, the TPS1120D has a pinout common with other p-channel MOSFETs in small-outline integrated circuit SOIC packages.
The TPS1120 is characterized for an operating junction temperature range, TJ, from – 40°C to 150°C.
AVAILABLE OPTIONS
PACKAGED DEVICES†
CHIP FORM
TJ
SMALL OUTLINE
(Y)
(D)
– 40°C to 150°C
TPS1120D
TPS1120Y
† The D p...
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