74ACT11153

74ACT11153 DUAL 1 OF 4 DATA SELECTOR/MULTIPLEXER Inputs Are TTL-Voltage Compatible Permits Multiplexing From N Lines to One Line Performs Parallel-to-Serial Conversion Strobe (Enable) Line Provided for Cascading (N Lines to N Lines) Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description This data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate strobe inputs (G) are provided for each of the two four-line sections. The 74ACT11153 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE SELECT INPUTS BA DATA INPUTS C0 C1 C2 C3 STROBE OUTPUT GY XX X X X X H L LL L XXX L L LLH X X X L H LHX L X X L L LHX H X X L H HL X X L X L L HL X X H X L H HH X X X L L L HH X X X H L H H = high level, L = low level, X = irrelevant SCAS118A – D3583, JUNE 1990 – REVISED APRIL 1993 D OR N PACKAGE (TOP VIEW) A B 1Y GND 2Y 1G 2G 2C3 1 2 3 4 5 6 7 8 16 1C0 15 1C1 14 1C2 13 1C3 12 VCC 11 2C0 10 2C1 9 2C2 logic symbol† 1 A 2 B 0 1 G 0 3 1G 6 16 1C0 15 1C1 14 1C2 13 1C3 7 2G 11 2C0 10 2C1 9 2C2 8 2C3 MUX EN 0 1 2 3 3 1Y 5 2Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC...