74ACT11174

74ACT11174 HEX D-TYPE FLIP-FLOP WITH CLEAR Inputs Are TTL-Voltage Compatible Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators Fully-Buffered Outputs for Maximum Isolation From External Disturbances Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs SCAS145 – D3435, MARCH 1990 – REVISED APRIL 1993 DW OR N PACKAGE (TOP VIEW) 1Q 2Q 3Q GND GND GND GND 4Q 5Q 6Q 1 2 3 4 5 6 7 8 9 10 20 CLR 19 1D 18 2D 17 3D 16 VCC 15 VCC 14 4D 13 5D 12 6D 11 CLK description This device contains six D-type flip-flops and is positive-edge-triggered with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The 74ACT11174 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS CLR CLK D OUTPUT Q LXX L H↑H H H↑ L L HLX Q0 EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is...