74ACT11175

ą Inputs Are TTL-Voltage Compatible Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators Fully-Buffered Outputs for Maximum Isolation From External Disturbances Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small- Outline Packages and Standard Plastic 300-mil DIPs 74ACT11175 QUADRUPLE DĆTYPE FLIPĆFLOP WITH CLEAR ą SCAS089 − D3385, DECEMBER 1989 − REVISED APRIL 1993 DW OR N PACKAGE (TOP VIEW) 1Q 2Q 2Q GND GND GND GND 3Q 3Q 4Q 1 2 3 4 5 6 7 8 9 10 20 1Q 19 CLR 18 1D 17 2D 16 VCC 15 VCC 14 3D 13 4D 12 CLK 11 4Q description This device contains six D-type flip-flops and is positive-edge-triggered with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The 74AC11175 is characterized for operation from − 40°C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS CLR CLK D Q Q L XX L H H ↑HH L H ↑L L H H L X Q0 Q0 EPIC is a tradem...