74ACT11191

ą 74ACT11191 SYNCHRONOUS 4ĆBIT UP/DOWN BINARY COUNTER ą SCAS106A − D3455, FEBRUARY 1990 − REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible Single Down/Up Count Control Line Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Asynchronously Presettable With Load Control Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs DW OR N PACKAGE (TOP VIEW) RCO QA QB GND GND GND GND QC QD MAX/MIN 1 2 3 4 5 6 7 8 9 10 20 D/U 19 CLK 18 A 17 B 16 VCC 15 VCC 14 C 13 D 12 CTEN 11 LOAD description The 74ACT11191 is a synchronous, 4-bit binary reversible up/down counter. A synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four flip-flops are triggered on a low-to-high-level transition of the clock input if the enable input (CTEN) is low. A high at CTEN inhibits counting. The direction of the count is determined by the level of the down/up (D/U) input. When D/U is low, the counter counts up and when D/U is high, it counts down. These counter...