8-Bit Binary Counter
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• Inputs Are TTL-Voltage Compatible • Parallel Registered Outputs • Internal Counters Have Direct Clear • Flow-Through...
Description
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Inputs Are TTL-Voltage Compatible Parallel Registered Outputs Internal Counters Have Direct Clear Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic
Small-Outline Packages and Standard Plastic 300-mil DIPs
74ACT11590 8ĆBIT BINARY COUNTER WITH REGISTERED 3ĆSTATE OUTPUTS
SCAS195 − D3989, MARCH 1992 − REVISED APRIL 1993
DW OR N PACKAGE (TOP VIEW)
QB QC QD GND
GND
GND
GND
QE QF QG
1 2 3 4 5 6 7 8 9 10
20 QA 19 CCK 18 CCKEN 17 CCLR 16 VCC 15 VCC 14 OE 13 RCK 12 RCO
11 QH
description
The 74ACT11590 contains an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register.
The binary counter features a direct clear (CCLR) input and a count-enable (CCKEN) input. For cascading, a ripple-carry (RCO) output is provided. Expansion is easily accomplished for two stages by connecting RCO of the first stage to CCKEN of the second stage. Cascading for larger count chains can be accomplished by connecting RCO of each stage to CCK of the following stage.
Both the register and the counter have individual positive-edge-triggered clocks. If both clocks are connected together, the counter state is always one count ahead of the register. Internal circuitry preven...
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