74ACT11874

74ACT11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS212 – D3447, MARCH 1990 – REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Asynchronous Clear Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C description The 74ACT11874 contains dual 4-bit registers featuring 3-state outputs designed specifically for bus driving. This makes this device particularly suitable for implementing buffer registers, I/O ports, and working registers. DW PACKAGE (TOP VIEW) 1CLK 1Q1 1Q2 1Q3 1Q4 GND GND GND GND 2Q1 2Q2 2Q3 2Q4 2CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 1OE 27 1CLR 26 1D1 25 1D2 24 1D3 23 1D4 22 VCC 21 VCC 20 2D1 19 2D2 18 2D3 17 2D4 16 2CLR 15 2OE The D-type edge-triggered flip-flops enter data on the low-to-high transition of the clock. The 74ACT11874 has CLR inputs and noninverting outputs. Taking CLR low causes the four Q outputs to go low independently of the clock. The 74ACT11874 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS OE CLR CLK D OUTPUT Q L LXX L LH↑H H LH↑ L L LHLX HXXX Q0 Z EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specificati...