Document
54ACT16544, 74ACT16544
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS161A – AUGUST 1990 – REVISED APRIL 1996
D Members of the Texas Instruments
Widebus™ Family
D Inputs Are TTL-Voltage Compatible D 3-State Inverted Outputs D Flow-Through Architecture Optimizes
PCB Layout
D Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D EPIC™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings
description
The ’ACT16544 are 16-bit registered transceivers that contain two sets of D-type latches for temporary storage of data flowing in either direction. They can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB) input must be low to enter data from A or to output data to B. Having CEAB low and LEAB low makes the A-to-B latches transparent; a subsequent low-to-high transition at LEAB puts the A latches in the storage mode. Data flow from B to A is similar, but requires using the CEBA, LEBA, and OEBA inputs.
54ACT16544 . . . WD PACKAGE 74ACT16544 . . . DL PACKAGE
(TOP VIEW)
1OEAB 1LEAB 1CEAB
GND 1A1 1A2 VCC 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2CEAB 2LEAB 2OEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 1OEBA 55 1LEBA 54 1CEBA 53 GND 52 1B1 51 1B2 50 VCC 49 1B3 48 1B4 47 1B5 46 GND 45 1B6 44 1B7 43 1B8 42 2B1 41 2B2 40 2B3 39 GND 38 2B4 37 2B5 36 2B6 35 VCC 34 2B7 33 2B8 32 GND 31 2CEBA 30 2LEBA 29 2OEBA
The 74ACT16544 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16544 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74ACT16544 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1996, Texas Instruments Incorporated 1
54ACT16544, 74ACT16544
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS161A – AUGUST 1990 – REVISED APRIL 1996
FUNCTION TABLE†
INPUTS CEAB LEAB OEAB
A
OUTPUT B
HXXX
Z
L XHX LHLX LLLL
Z B0‡
H
L L LH
L
† A-to-B data flow is shown: B-to-A flow control is the same except that it uses CEBA, LEBA, and OEBA.
‡ Output level before the indicated steady-state input conditions were established
•2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol†
54ACT16544, 74ACT16544
16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS161A – AUGUST 1990 – REVISED APRIL 1996
1OEBA 1CEBA 1LEBA 1OEAB 1CEAB 1LEAB 2OEBA 2CEBA 2LEBA 2OEAB 2CEAB 2LEAB
1A1
56 54 55 1 3 2 29 31 30 28 26 27
5
6 1A2
8 1A3
9 1A4
10 1A5
12 1A6
13 1A7
14 1A8
15 2A1
16 2A2
17 2A3
19 2A4
20 2A5
21 2A6
23 2A7
24 2A8
1 EN3 G1 1 C5 2 EN4 G2 2 C6 7 EN9 G7 7 C11 8 EN10 G8 8 C12
3 1 5D 6D 1 4
9 1 11D 12D 1 10
52 1B1
51 1B2
49 1B3
48 1B4
47 1B5
45 1B6
44 1B7
43 1B8
42 2B1
41 2B2
40 2B3
38 2B4
37 2B5
36 2B6
34 2B7
33 2B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
54ACT16544, 74ACT16544 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS161A – AUGUST 1990 – REVISED APRIL 1996
logic diagram (positive logic)
1OEBA 56
54 1CEBA
1LEBA 1OEAB 1CEAB 1LEAB
55 1 3 2
5 1A1
C1 1D
C1 1D
2OEBA 29
31 2CEBA
2LEBA 2OEAB 2CEAB 2LEAB
30 28 26 27
15 2A1
To Seven Other Channels
C1 1D C1 1D
To Seven Other Channels
52 1B1 42 2B1
•4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
54ACT16544, 74ACT16544 16-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS161A – AUGUST 1990 – REVISED APRIL 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . ..