MP5002 Switch Datasheet

MP5002 Datasheet, PDF, Equivalent


Part Number

MP5002

Description

1A-3A Programmable Current Limit Switch

Manufacture

MPS

Total Page 12 Pages
Datasheet
Download MP5002 Datasheet


MP5002
The Future of Analog IC Technology
MP5002
3.3V, 1A-3A Programmable Current
Limit Switch
DESCRIPTION
The MP5002 is a protection device designed to
protect circuitry on the output (VOUT) from
transients on the input (VIN). It also protects VIN
from undesired shorts and transients coming
from the load.
At start up, inrush current is limited by limiting the
slew rate at VOUT. The slew rate is controlled by a
small capacitor at the dv/dt pin. The dv/dt pin has
an internal circuit that allows the customer to float
this pin (no connect) and still receive a 1.1ms
ramp time at VOUT.
The max load at the output (VOUT) is current
limited. This is accomplished by utilizing a sense
FET topology. The magnitude of the current limit
is controlled by an external resistor connected
between the ILIMIT pins.
An internal charge pump drives the gate of the
power device, allowing a very low on-resistance
DMOS power FET of just 44m.
VOUT is protected from VIN being too low or too
high. Under Voltage Lockout (UVLO) assures
that the input is above the minimum operating
threshold, before the power device is turned on.
If VIN goes above the high output threshold, the
output voltage will be limited.
FEATURES
Integrated 44mPower FET
Enable/Fault Pin
Adjustable Slew Rate for Output Voltage
Adjustable Current Limit: 1A-3A
Thermal Protection
Over Voltage Limit
APPLICATIONS
Hot Swap
PC Cards
Cell Phones
Laptops
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN
EN
Cdv/dt
(Optional)
11
6
VIN
+ILIMIT
VOUT 5
7
-ILIMIT
VOUT 4
8 Enable/Fault VOUT 3
MP5002
9 dv/dt
VOUT 2
10 GND
VOUT 1
VOUT
MP5002 Rev. 0.93
10/15/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
1

MP5002
MP5002 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH
Part Number*
MP5002DQ
ORDERING INFORMATION
Package
QFN10 (3x3)
Top Marking
3H
Free Air Temperature (TA)
–40°C to +85°C
* For Tape & Reel, add suffix –Z (e.g. MP5002DQ–Z);
For RoHS compliant packaging, add suffix –LF; (eg. 5002DQ–LF–Z)
PACKAGE REFERENCE
TOP VIEW
VOUT
VOUT
VOUT
VOUT
VOUT
1 10 GND
2 EXPOSED 9 dv/dt
3 PAD 8 ENABLE/FAULT
VIN
4
7 -ILIMIT
5 6 +ILIMIT
ABSOLUTE MAXIMUM RATINGS (1)
VIN, VOUT, ILIMIT .............................................. 22V
dv/dt, ENABLE/FAULT .................................. 6V
Continuous Power Dissipation (TA = +25°C) (2)
............................................................. 2.5W
Storage Temperature............... -65°C to +155°C
Junction Temp…………………..-40°C to +150°C
Recommended Operating Conditions
Input Voltage Operating Range……….2.5V to 4V
Operating Junct. Temp (TJ)…….-40°C to +125°C
Thermal Resistance (3) θJA θJC
QFN10 ....................................50 ...... 12 ... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) Measured on JESD51-7 4-layer board.
MP5002 Rev. 0.93
10/15/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
2


Features The Future of Analog IC Technology MP50 02 3.3V, 1A-3A Programmable Current Lim it Switch DESCRIPTION The MP5002 is a protection device designed to protect c ircuitry on the output (VOUT) from tran sients on the input (VIN). It also prot ects VIN from undesired shorts and tran sients coming from the load. At start u p, inrush current is limited by limitin g the slew rate at VOUT. The slew rate is controlled by a small capacitor at t he dv/dt pin. The dv/dt pin has an inte rnal circuit that allows the customer t o float this pin (no connect) and still receive a 1.1ms ramp time at VOUT. The max load at the output (VOUT) is curre nt limited. This is accomplished by uti lizing a sense FET topology. The magnit ude of the current limit is controlled by an external resistor connected betwe en the ILIMIT pins. An internal charge pump drives the gate of the power devic e, allowing a very low on-resistance DM OS power FET of just 44mΩ. VOUT is pr otected from VIN being too low or too high. Under Voltage Lockout.
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