SY89306V Datasheet PDF Download, Microchip





(PDF) SY89306V Datasheet Download

Part Number SY89306V
Description 3.3V/5V 2.5GHz Differential PECL/ECL Receiver/Buffer
Manufacture Microchip
Total Page 16 Pages
PDF Download Download SY89306V Datasheet PDF

Features: SY89306V 3.3V/5V 2.5 GHz Differential PE CL/ECL Receiver/Buffer Features • Ma ximum Frequency > 2.5 GHz • Inputs (D , /D) Include 75 kΩ Input Pull-Down Re sistors • 100K PECL/ECL Compatible Industrial Temperature Range: –40° C to +85°C • Available in an Ultra S mall 8-Pin 2 mm x 2 mm DFN Package Pack age Type SY89306V 8-Lead DFN General D escription The SY89306V is a high-speed differential buffer/receiver. The devi ce is functionally equivalent to the SY 100EL16V and SY88927V buffers, but feat ures a 70% smaller footprint. The SY893 06V includes a VBB reference for single -ended AC-coupling applications. Whenev er used, the VBB pin should be bypassed to ground via a 0.01 μF capacitor. VB B reference can only sink/source 0.5 mA . Under open input conditions (pulled t o VEE), internal input clamps will forc e the Q output LOW. Block Diagram NC D /D VBB 1 2 3 4 8 VCC 7Q 6 /Q 5 VEE DQ /D AV 40V/V /Q  2019 Microchip T echnology Inc. DS20006211A-page 1 SY89306V 1.0 ELECTRICAL CHARACTERISTICS Abso.

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SY89306V
3.3V/5V 2.5 GHz Differential PECL/ECL Receiver/Buffer
Features
• Maximum Frequency > 2.5 GHz
• Inputs (D, /D) Include 75 kΩ Input Pull-Down
Resistors
• 100K PECL/ECL Compatible
• Industrial Temperature Range: –40°C to +85°C
• Available in an Ultra Small 8-Pin 2 mm x 2 mm
DFN Package
Package Type
SY89306V
8-Lead DFN
General Description
The SY89306V is a high-speed differential
buffer/receiver. The device is functionally equivalent to
the SY100EL16V and SY88927V buffers, but features
a 70% smaller footprint.
The SY89306V includes a VBB reference for
single-ended AC-coupling applications. Whenever
used, the VBB pin should be bypassed to ground via a
0.01 μF capacitor. VBB reference can only sink/source
0.5 mA.
Under open input conditions (pulled to VEE), internal
input clamps will force the Q output LOW.
Block Diagram
NC
D
/D
VBB
1
2
3
4
8 VCC
7Q
6 /Q
5 VEE
DQ
/D AV 40V/V /Q
2019 Microchip Technology Inc.
DS20006211A-page 1

                    
                    






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