NOT RECOMMENDED FOR NEW DESIGNS
5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip
The SY10/100EL34/L are low-skew ÷2, ÷4, ÷8 clock
generation chips designed explicitly for low-skew clock
generation applications. The internal dividers are
synchronous to each other; therefore, the common output
edges are all precisely aligned. The devices can be driven
by either a differential or single-ended ECL or, if positive
power supplies are used, PECL input signal. In addition,
by using the VBB output, a sinusoidal source can be AC-
coupled into the device. If a single-ended input is to be
used, the VBB output should be connected to the CLK
input and bypassed to ground via a 0.01µF capacitor. The
VBB output is designed to act as the switching reference for
the input of the EL34/L under single-ended input
conditions. As a result, this pin can only source/ sink up to
0.5mA of current.
The common enable ( EN ) is synchronous so that the
internal dividers will only be enabled/disabled when the
internal clock is already in the LOW state. This avoids any
chance of generating a runt clock pulse on the internal
clock when the device is enabled/disabled as can happen
with an asynchronous control. An internal runt pulse could
lead to losing synchronization between the internal divider
stages. The internal enable flip-flop is clocked on the
falling edge of the divider stages. The internal enable flip-
flop is clocked on the falling edge of the input clock;
therefore, all associated specification limits are referenced
to the negative edge of the clock input.
Upon start-up, the internal flip-flops will attain a random
state; the master reset (MR) input allows for the
synchronization of the internal dividers, as well as for
multiple EL34/Ls in a system.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
• 3.3V and 5V power supply options
• 50ps output-to-output skew
• Synchronous enable/disable
• Master Reset for synchronization
• Internal 75KΩ input pull-down resistors
• Available in 16-pin SOIC package
Differential clock inputs.
Differential ÷2 outputs.
Differential ÷4 outputs.
Differential ÷8 outputs.
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
email@example.com or (408) 955-1690