SY100EL56V Datasheet PDF Download, Microchip





(PDF) SY100EL56V Datasheet Download

Part Number SY100EL56V
Description 5V/3.3V Dual Differential 2:1 Multiplexer
Manufacture Microchip
Total Page 14 Pages
PDF Download Download SY100EL56V Datasheet PDF

Features: SY100EL56V 5V/3.3V Dual Differential 2:1 Multiplexer Features • 3.3V and 5V Power Supply Option • 440 ps Typical Propagation Delay • Separate and Comm on Select • High Bandwidth Output Tra nsitions • Internal 75 kΩ Input Pull Down Resistors • Available in 20-Pin SOIC Package Package Type SY100EL56V 2 0-Lead SOIC (Z) D0A 1 /D0A 2 VBB0 3 D0 B 4 /D0B 5 D1A 6 /D1A 7 VBB1 8 D1B 9 /D 1B 10 20 VCC 19 Q0 18 /Q0 17 SEL0 16 C OM_SEL 15 SEL1 14 VCC 13 Q1 12 /Q1 11 V EE General Description The SY100EL56V is a dual, fully differential 2:1 multi plexer. The differential data path make s the device ideal for multiplexing low skew clock or other skew sensitive sig nals. Multiple VBB pins are provided to ease AC coupling input signals. The de vice features both individual and commo n select inputs to address both data pa th and random logic applications. The d ifferential inputs have special circuit ry which ensures device stability under open input conditions. When both differential inputs are left open the D in.

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SY100EL56V
5V/3.3V Dual Differential 2:1 Multiplexer
Features
• 3.3V and 5V Power Supply Option
• 440 ps Typical Propagation Delay
• Separate and Common Select
• High Bandwidth Output Transitions
• Internal 75 kΩ Input Pull Down Resistors
• Available in 20-Pin SOIC Package
Package Type
SY100EL56V
20-Lead SOIC (Z)
D0A 1
/D0A 2
VBB0 3
D0B 4
/D0B 5
D1A 6
/D1A 7
VBB1 8
D1B 9
/D1B 10
20 VCC
19 Q0
18 /Q0
17 SEL0
16 COM_SEL
15 SEL1
14 VCC
13 Q1
12 /Q1
11 VEE
General Description
The SY100EL56V is a dual, fully differential 2:1
multiplexer. The differential data path makes the device
ideal for multiplexing low skew clock or other skew
sensitive signals. Multiple VBB pins are provided to
ease AC coupling input signals.
The device features both individual and common select
inputs to address both data path and random logic
applications.
The differential inputs have special circuitry which
ensures device stability under open input conditions.
When both differential inputs are left open the D input
will pull down to VEE, the /D input will bias around VCC/2
forcing the Q output LOW.
2019 Microchip Technology Inc.
DS20006242A-page 1

                    
                    






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