1-LINE TO 8-LINE CLOCK DRIVER
D Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
D TTL-Compatible Inputs and Outputs
D Distributes One Clock Input to Eight
D Distributed VCC and Ground Pins Reduce
D High-Drive Outputs (â 48-mA IOH,
D State-of-the-Art EPIC-ÎÎBâ¢ BiCMOS Design
Significantly Reduces Power Dissipation
D Package Options Include Ceramic
Flatpacks (W), Ceramic Chip Carriers (FK),
and Ceramic (J) 300-mil DIPS
SGAS005A â MARCH 1996 â REVISED JULY 1997
J OR W PACKAGE
The SN54CDC341 is a high-performance clock-
driver circuit that distributes one (A) input signal to
eight (Y) outputs with minimum skew for clock
distribution. Through the use of the control pins
(1G and 2G), the outputs can be placed in a low
state regardless of the A input.
The propagation delays are adjusted at the factory
using the P0 and P1 pins. These pins are not
intended for customer use and should be strapped
3 2 1 20 19
9 10 11 12 13
The SN54CDC341 is characterized for operation over the full military temperature range of â55Â°C to 125Â°C.
A 1Y1 â 1Y4 2Y1 â 2Y4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ÎÎB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright Â© 1997, Texas Instruments Incorporated
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â¢POST OFFICE BOX 1443 HOUSTON, TEXAS 77251â1443