SN64BCT240

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V Per MIL-STD-883C Method 3015 High-Impedance State During Power-Up and Power-Down Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (N) description SN64BCT240 OCTAL BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCBS049A − MAY 1990 − REVISED NOVEMBER 1993 DW OR N PACKAGE (TOP VIEW) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 2 3 4 5 6 7 8 9 10 20 VCC 19 2OE 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 2A1 This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the SN64BCT241 and SN64BCT244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. The SN64BCT240 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. The SN64BCT240 is characterized for operation from −40°C to 85°C and 0°C to 70°C. FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y LH L LL H HX Z PRODUCTION DATA information is current as of publication...