SN64BCT374 Datasheet | Octal EDGE-Triggered D-Type FLIP-FLOP





(Datasheet) SN64BCT374 Datasheet PDF Download

Part Number SN64BCT374
Description Octal EDGE-Triggered D-Type FLIP-FLOP
Manufacture etcTI
Total Page 4 Pages
PDF Download Download SN64BCT374 Datasheet PDF

Features: SN64BCT374 OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCBS0 66A − JUNE 1990 − REVISED NOVEMBER 1993 • State-of-the-Art BiCMOS Desig n Significantly Reduces ICCZ • ESD Pr otection Exceeds 2000 V Per MIL-STD-883 C, Method 3015; Exceeds 200 V Using Mac hine Model (C = 200 pF, R = 0) • High -Impedance State During Power Up and Po wer Down • 3-State True Outputs Drive Bus Lines or Buffer-Memory Address Reg isters • Full Parallel Access for Loa ding • Package Options Include Plasti c Small-Outline (DW) Packages and Stand ard Plastic 300-mil DIPs (N) DW OR N P ACKAGE (TOP VIEW) OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 2 3 4 5 6 7 8 9 10 20 VC C 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 1 3 5D 12 5Q 11 CLK description This 8-b it flip-flop features 3-state outputs d esigned specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O por ts, bidirectional bus drivers, and working registers. The eight flip-flops of the S.

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SN64BCT374
OCTAL EDGEĆTRIGGERED DĆTYPE FLIPĆFLOP
WITH 3ĆSTATE OUTPUTS
SCBS066A − JUNE 1990 − REVISED NOVEMBER 1993
State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
High-Impedance State During Power Up and
Power Down
3-State True Outputs Drive Bus Lines or
Buffer-Memory Address Registers
Full Parallel Access for Loading
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)
DW OR N PACKAGE
(TOP VIEW)
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 CLK
description
This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The eight flip-flops of the SN64BCT374 are edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance impedance state and increased drive provide the capability to
drive bus lines without need for interface or pullup components.
The output-enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The outputs are in a high-impedance state during power up and power down when the supply voltage is less
than approximately 3 V.
The SN64BCT374 is characterized for operation from −ā 40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OE CLK D
OUTPUT
Q
LH
H
LL
L
LLX
HXX
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
1

           






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