SN64BCT2827C

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Output Ports Have Equivalent 33-Ω Series Resistors, So No External Resistors Are Required High-Impedance State During Power Up and Power Down 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT) SN64BCT2827C 10ĆBIT BUS/MOS MEMORY DRIVER WITH 3ĆSTATE OUTPUTS SCBS415 − APRIL 1987 − REVISED NOVEMBER 1993 DW OR NT PACKAGE (TOP VIEW) OE1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 VCC 23 Y1 22 Y2 21 Y3 20 Y4 19 Y5 18 Y6 17 Y7 16 Y8 15 Y9 14 Y10 13 OE2 description This 10-bit buffer and bus/MOS driver provides a high-performance bus interface for wide data paths or buses carrying parity. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all ten outputs are in the high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. The outputs, which are designed to source or sink up to 12 mA, include 33-Ω series resistors to reduce overshoot and undershoot. The SN64BCT2827C is characterized for operation from − 40...