SN64BCT29828B Datasheet: 10-Bit Buffer/Driver





SN64BCT29828B 10-Bit Buffer/Driver Datasheet

Part Number SN64BCT29828B
Description 10-Bit Buffer/Driver
Manufacture etcTI
Total Page 5 Pages
PDF Download Download SN64BCT29828B Datasheet PDF

Features: • State-of-the-Art BiCMOS Design Signi ficantly Reduces ICCZ • ESD Protectio n Exceeds 2000 V Per MIL-STD-883C, Meth od 3015; Exceeds 200 V Using Machine Mo del (C = 200 pF, R= 0) • High-Impedan ce State During Power Up and Power Down • 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers • P- N-P Inputs Reduce DC Loading • Flow-T hrough Architecture Optimizes PCB Layou t • Package Options Include Plastic S mall-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT) SN64BCT2982 8B 10ĆBIT BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCBS478 − MAY 1993 − REVISE D NOVEMBER 1993 DW OR NT PACKAGE (TOP V IEW) OE1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A1 0 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 V CC 23 Y1 22 Y2 21 Y3 20 Y4 19 Y5 18 Y6 17 Y7 16 Y8 15 Y9 14 Y10 13 OE2 descri ption This 10-bit buffer/driver provide s high-performance bus interface for wi de data paths or buses carrying parity. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input .

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State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R= 0)
High-Impedance State During Power Up
and Power Down
3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
P-N-P Inputs Reduce DC Loading
Flow-Through Architecture Optimizes
PCB Layout
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT)
SN64BCT29828B
10ĆBIT BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCBS478 − MAY 1993 − REVISED NOVEMBER 1993
DW OR NT PACKAGE
(TOP VIEW)
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 Y1
22 Y2
21 Y3
20 Y4
19 Y5
18 Y6
17 Y7
16 Y8
15 Y9
14 Y10
13 OE2
description
This 10-bit buffer/driver provides high-performance bus interface for wide data paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2)
input is high, all ten outputs are in the high-impedance state. The outputs are also in the high-impedance state
during power-up and power-down conditions. The outputs remain in the high-impedance state while the device
is powered down.
The SN64BCT29828B is characterized for operation from − 40°C to 85°C and 0°C to 70°C.
FUNCTION TABLE
INPUTS
OE1 OE2 A
OUTPUT
Y
LLL
H
L LH
L
HXX
Z
XHX
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
3−1

              






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