SN75C091A

SN75C091A SCSI Bus Controller Data Manual 1 Introduction 1.1 Description The SN75C091A provides the capability to interface a microprocessor subsystem to the ANSI Small Computer Systems Interface (SCSI). This single-ended SCSI implementation acts as one of up to eight nodes communicating over a maximum six-meter bus as detailed in the SCSI specification (ANSI X3.131-1986). Its microprocessor and DMA interfaces allow the SN75C091A SCSI Bus Controller (SBC) to be used in a variety of host or peripheral applications. This document is not intended to serve as a tutorial on the Small Computer Systems Interface bus; users should refer to ANSI X3.131-1986 for detailed information regarding the SCSI bus. 1.2 Features 1.2.1 SCSI Bus Interface Complies with ANSI X3.131-1986 SCSI standard Performs INITIATOR and TARGET functions Supports arbitration, selection, and reselection Performs asynchronous data transfers of up to 5 Megabytes/second (MBps) Performs synchronous data transfers of up to 5 Megabytes/second (MBps) with programmable offset up to 15 Has on-chip 48-mA transceivers Provides optional parity generation, checking, and pass-through Reduces overhead associated with initiator multi-threading by automatically handling savedata-pointer messages, disconnects, and reconnects Performs automatic message and command-length decoding Has two 32-byte FIFOs for command and message preloading 1.2.2 Microprocessor Interface Provides chip control...