TM2SJ64EPU

TM2SJ64EPU 2ā097ā152 BY 64ĆBIT SYNCHRONOUS DYNAMIC RAM MODULES Ċ SODIMM D Organization: 2 097 152 x 64 Bits D Single 3.3-V Power Supply (±10% Tolerance) D Designed for 66-MHz 4-Clock Systems D JEDEC 144-Pin Small-Outline Dual-In-Line Memory Module (SODIMM) Without Buffer for Use With Socket D Uses Eight 16M-Bit Synchronous Dynamic RAMs (SDRAMs) (2M × 8-Bit) in Plastic Thin Small-Outline Packages (TSOPs) D Byte-Read/Write Capability D Read Latencies 2 and 3 Supported D Performance Ranges: SMMS687B − AUGUST 1997 − REVISED FEBRUARY 1998 D Support Burst-Interleave and Burst-Interrupt Operations D Burst Length Programmable to 1, 2, 4, and 8 D Two Banks for On-Chip Interleaving (Gapless Access) D Ambient Temperature Range 0°C to 70°C D Gold-Plated Contacts D Pipeline Architecture D High-Speed, Low-Noise Low-Voltage TTL (LVTTL) Interface D Serial Presence Detect (SPD) Using EEPROM SYNCHRONOUS CLOCK CYCLE TIME (CtLC=K33)‡ tCK2 (CL = 2) ACCESS TIME CLOCK TO OUTPUT tAC3 tAC2 (CL = 3) (CL = 2) ’xSJ64EPU-12A† 12 ns 15 ns 9 ns 9 ns ’xSJ64EPU-12 12 ns 18 ns 9 ns 10 ns † −12A speed device is supported only at −5 to 10% VDD ‡ CL = CAS latency REFRESH INTERVAL 64 ms 64 ms description The TM2SJ64EPU is a 16M-byte, 144-pin small-outline dual-in-line memory module (SODIMM). The SODIMM is composed of eight TMS626812DGE, 2 097 152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package (TSOP) mounted on a substrate with decoupling capacitors. See the TMS...