TM8SK64KPU Datasheet: SYNCHRONOUS DYNAMIC RAM MODULES





TM8SK64KPU Datasheet PDF

Part Number TM8SK64KPU
Description SYNCHRONOUS DYNAMIC RAM MODULES
Manufacture etcTI
Total Page 17 Pages
PDF Download Download TM8SK64KPU Datasheet PDF

Features: TM4SK64KPU 4ā194ā304 BY 64ĆBIT TM8SK6 4KPU 8ā388ā608 BY 64ĆBIT SYNCHRONOUS DYNAMIC RAM MODULES Ċ SODIMM SMMS691A − AUGUST 1997 − REVISED NOVEMBER 1 997 D Organization: − TM4SK64KPU . . . 4 194 304 x 64 Bits − TM8SK64KPU . . . 8 388 608 x 64 Bits D Single 3.3-V Power Supply (±10% Tolerance) D Desig ned for 66-MHz 4-Clock Systems. D JEDEC 144-Pin Small-Outline Dual-In-Line Mem ory Module (SODIMM) Without Buffer for Use With Socket D TM4SK64KPU — Uses F our 64M-Bit Synchronous Dynamic RAMs (S DRAMs) (4M × 16-Bit) in Plastic Thin S mall-Outline Packages (TSOPs) D TM8SK64 KPU — Uses Eight 64M-Bit SDRAMs (4M 16-Bit) in Plastic TSOPs D Byte-Read/ Write Capability D Performance Ranges: D High-Speed, Low-Noise Low-Voltage TT L (LVTTL) Interface D Read Latencies 2 and 3 Supported D Support Burst-Interle ave and Burst-Interrupt Operations D Bu rst Length Programmable to 1, 2, 4, 8, and Full Page D Four Banks for On-Chip Interleaving (Gapless Access) D Ambient Temperature Range 0°C to 70°C D Gold-Plated C.

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TM8SK64KPU datasheet
TM4SK64KPU 4ā194ā304 BY 64ĆBIT
TM8SK64KPU 8ā388ā608 BY 64ĆBIT
SYNCHRONOUS DYNAMIC RAM MODULES Ċ SODIMM
SMMS691A − AUGUST 1997 − REVISED NOVEMBER 1997
D Organization:
− TM4SK64KPU . . . 4 194 304 x 64 Bits
− TM8SK64KPU . . . 8 388 608 x 64 Bits
D Single 3.3-V Power Supply
(±10% Tolerance)
D Designed for 66-MHz 4-Clock Systems.
D JEDEC 144-Pin Small-Outline Dual-In-Line
Memory Module (SODIMM) Without Buffer
for Use With Socket
D TM4SK64KPU — Uses Four 64M-Bit
Synchronous Dynamic RAMs (SDRAMs)
(4M × 16-Bit) in Plastic Thin Small-Outline
Packages (TSOPs)
D TM8SK64KPU — Uses Eight 64M-Bit
SDRAMs (4M × 16-Bit) in Plastic TSOPs
D Byte-Read/Write Capability
D Performance Ranges:
D High-Speed, Low-Noise Low-Voltage TTL
(LVTTL) Interface
D Read Latencies 2 and 3 Supported
D Support Burst-Interleave and
Burst-Interrupt Operations
D Burst Length Programmable to 1, 2, 4,
8, and Full Page
D Four Banks for On-Chip Interleaving
(Gapless Access)
D Ambient Temperature Range
0°C to 70°C
D Gold-Plated Contacts
D Pipeline Architecture
D Serial Presence-Detect (SPD) Using
EEPROM
’xSK64KPU − 10
’xSK64KPU − 12
SYNCHRONOUS
CLOCK CYCLE
TIME
tCK3
tCK2
10 ns
10 ns
12 ns
12 ns
ACCESS TIME
CLOCK TO
OUTPUT
tAC3
tAC2
7.5 ns
9 ns
8 ns 9.5 ns
REFRESH
INTERVAL
tREF
64 ms
description
The TM4SK64KPU is a 32M-byte, 144-pin small-outline dual-in-line memory module (SODIMM). The SODIMM
is composed of four TMS664164DGE, 4 194 304 x 16-bit SDRAMs, each in a 400-mil, 54-pin plastic thin
small-outline package (TSOP) mounted on a substrate with decoupling capacitors. See the TMS664164 data
sheet (literature number SMOS690).
The TM8SK64KPU is a 64M-byte, 144-pin SODIMM. The SODIMM is composed of eight TMS664164DGE,
4 194 304 x 16-bit SDRAMs, each in a 400-mil, 54-pin plastic TSOP mounted on a substrate with decoupling
capacitors. See the TMS664164 data sheet (literature number SMOS690).
operation
The TM4SK64KPU operates as four TMS664164DGE devices that are connected as shown in the
TM4SK64KPU functional block diagram. The TM8SK64KPU operates as eight TMS664164DGE devices
connected as shown in the TM8SK64KPU functional block diagram.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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