TM4SP64KPU Datasheet: SYNCHRONOUS DYNAMIC RAM MODULES





TM4SP64KPU SYNCHRONOUS DYNAMIC RAM MODULES Datasheet

Part Number TM4SP64KPU
Description SYNCHRONOUS DYNAMIC RAM MODULES
Manufacture etcTI
Total Page 18 Pages
PDF Download Download TM4SP64KPU Datasheet PDF

Features: TM4SP64KPU 4ā194ā304 BY 64ĆBIT TM8SP6 4KPU 8ā388ā608 BY 64ĆBIT SYNCHRONOUS DYNAMIC RAM MODULES SMMS689 − AUGUST 1997 D Organization: − TM4SP64KPU . . . 4 194 304 x 64 Bits − TM8SP64KPU . . . 8 388 608 x 64 Bits D Single 3.3 -V Power Supply (±10% Tolerance) D Des igned for 66-MHz 4-Clock Systems D JEDE C 168-Pin Dual-In-Line Memory Module (D IMM) Without Buffer for Use With Socket D TM4SP64KPU — Uses Four 64M-Bit Syn chronous Dynamic RAMs (SDRAMs) (4M × 1 6-Bit) in Plastic Thin Small-Outline Pa ckages (TSOPs) D TM8SP64KPU — Uses Ei ght 64M-Bit SDRAMs (4M × 16-Bit) in Pl astic TSOPs D Byte-Read/Write Capabilit y D Performance Ranges: D High-Speed, Low-Noise Low-Voltage TTL (LVTTL) Inter face D Read Latencies 2 and 3 Supported D Support Burst-Interleave and Burst-I nterrupt Operations D Burst Length Prog rammable to 1, 2, 4, 8, and Full Page D Four Banks for On-Chip Interleaving (G apless Access) D Ambient Temperature Ra nge 0°C to 70°C D Gold-Plated Contacts D Pipeline Architecture D Serial Presence-D.

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TM4SP64KPU 4ā194ā304 BY 64ĆBIT
TM8SP64KPU 8ā388ā608 BY 64ĆBIT
SYNCHRONOUS DYNAMIC RAM MODULES
SMMS689 − AUGUST 1997
D Organization:
− TM4SP64KPU . . . 4 194 304 x 64 Bits
− TM8SP64KPU . . . 8 388 608 x 64 Bits
D Single 3.3-V Power Supply
(±10% Tolerance)
D Designed for 66-MHz 4-Clock Systems
D JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) Without Buffer for Use With
Socket
D TM4SP64KPU — Uses Four 64M-Bit
Synchronous Dynamic RAMs (SDRAMs)
(4M × 16-Bit) in Plastic Thin Small-Outline
Packages (TSOPs)
D TM8SP64KPU — Uses Eight 64M-Bit
SDRAMs (4M × 16-Bit) in Plastic TSOPs
D Byte-Read/Write Capability
D Performance Ranges:
D High-Speed, Low-Noise Low-Voltage TTL
(LVTTL) Interface
D Read Latencies 2 and 3 Supported
D Support Burst-Interleave and
Burst-Interrupt Operations
D Burst Length Programmable to 1, 2, 4, 8,
and Full Page
D Four Banks for On-Chip Interleaving
(Gapless Access)
D Ambient Temperature Range
0°C to 70°C
D Gold-Plated Contacts
D Pipeline Architecture
D Serial Presence-Detect (SPD) Using
EEPROM
’xSP64KPU-10
’xSP64KPU-12
SYNCHRONOUS
CLOCK CYCLE
TIME
tCK3
tCK2
10 ns
15 ns
12 ns
15 ns
ACCESS TIME
CLOCK TO
OUTPUT
tAC3
tAC3
9 ns 9 ns
9.5 ns 9.5 ns
REFRESH
INTERVAL
tREF
64 ms
description
The TM4SP64KPU is a 32M-byte, 168-pin dual-in-line memory module (DIMM). The DIMM is composed of
fourTMS664164DGE, 4194 304 x 16-bit SDRAMs, each in a 400-mil, 54-pin plastic thin small-outline package
(TSOP) mounted on a substrate with decoupling capacitors. See the TMS664164 data sheet (literature number
SMOS690).
The TM8SP64KPU is a 64M-byte, 168-pin DIMM. The DIMM is composed of eight TMS664164DGE,
4 194 304 x 16-bit SDRAMs, each in a 400-mil, 54-pin plastic TSOP mounted on a substrate with decoupling
capacitors. See the TMS664164 data sheet (literature number SMOS690).
operation
The TM4SP64KPU operates as four TMS664164DGE devices that are connected as shown in the
TM4SP64KPU functional block diagram. The TM8SP64KPU operates as eight TMS664164DGE devices
connected as shown in the TM8SP64KPU functional block diagram.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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