TMS29F400B

PRODUCT PREVIEW "D Single Power Supply Supports 5 V 10% Read/Write Operation D Organization . . . 524288 By 8 Bits 262 144 By 16 Bits D Array-Blocking Architecture – One 16K-Byte/One 8K-Word Boot Sector – Two 8K-Byte/4K-Word Parameter Sectors – One 32K-Byte/16K-Word Sector – Seven 64K-Byte/32K-Word Sectors – Any Combination of Sectors Can Be Erased. Supports Full-Chip Erase – Any Combination of Sectors Can Be Marked as Read-Only D Boot-Code Sector Architecture – T = Top Sector – B = Bottom Sector D Sector Protection – Hardware Protection Method That Disables Any Combination of Sectors From Write or Erase Operations Using Standard Programming Equipment D Embedded Program/Erase Algorithms – Automatically Pre-Programs and Erases Any Sector – Automatically Programs and Verifies the Program Data at Specified Address D JEDEC Standards – Compatible With JEDEC Byte Pinouts – Compatible With JEDEC EEPROM Command Set D Fully Automated On-Chip Erase and Program Operations D 100 000 Program/Erase Cycles D Low Power Dissipation – 40-mA Typical Active Read for Byte Mode – 50-mA Typical Active Read for Word Mode – 60-mA Typical Program/Erase Current – Less Than 100-µA Standby Current – 5 µA in Deep Power-Down Mode D All Inputs/Outputs TTL-Compatible TMS29F400T, TMS29F400B 524288 BY 8-BIT/262144 BY 16-BIT FLASH MEMORIES SMJS843A – MAY 1997 – REVISED SEPTEMBER 1997 D Erase Suspend/Resume – Supports Reading Data From, or Programming Data to, a Sector Not Being Erased D Hardware-Reset Pin Ini...