TMS46100

ADVANCE INFORMATION TMS44100, TMS44100P, TMS46100, TMS46100P 4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES SMHS561A – MARCH 1995 – REVISED JUNE 1995 D Organization . . . 4 194304 × 1 D Single 5 V Power Supply, for TMS44100 / P (± 10% Tolerance) D Single 3.3 V Power Supply, for TMS46100 / P (± 10% Tolerance) D Low Power Dissipation ( TMS46100P only) – 200-µA CMOS Standby – 200-µA Self Refresh – 300-µA Extended-Refresh Battery Backup D Performance Ranges: ACCESS ACCESS ACCESS READ TIME TIME TIME OR WRITE (tRAC) (tCAC) (tAA) (MAX) (MAX) (MAX) CYCLE (MIN) ’4x100/P-60 60 ns 15 ns 30 ns 110 ns ’4x100/P-70 70 ns 18 ns 35 ns 130 ns ’4x100/P-80 80 ns 20 ns 40 ns 150 ns D Enhanced Page-Mode Operation for Faster Memory Access D CAS-Before-RAS ( CBR) Refresh D Long Refresh Period – 1024-Cycle Refresh in 16 ms – 128 ms (Max) for Low-Power, Self-Refresh Version ( TMS4x100P) D 3-State Unlatched Output D Texas Instruments EPIC™ CMOS Process D Operating Free-Air Temperature Range 0°C to 70°C description DGA PACKAGE ( TOP VIEW ) DJ PACKAGE ( TOP VIEW ) D W RAS NC A10 1 2 3 4 5 26 VSS 25 Q D1 W2 24 CAS RAS 3 23 NC NC 4 22 A9 A10 5 26 VSS 25 Q 24 CAS 23 NC 22 A9 A0 A1 A2 A3 VCC 9 10 11 12 13 18 A8 17 A7 16 A6 15 A5 14 A4 A0 A1 A2 A3 VCC 9 10 11 12 13 18 A8 17 A7 16 A6 15 A5 14 A4 PIN NOMENCLATURE A0 – A10 CAS D NC Q RAS W VCC VSS Address Inputs Column-Address Strobe Data In No Connection Data Out Row-Address Strobe Write Enable 5-V or 3.3-V Sup...